From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965879AbcLVQPz (ORCPT ); Thu, 22 Dec 2016 11:15:55 -0500 Received: from smtpout.microchip.com ([198.175.253.82]:30270 "EHLO email.microchip.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S965642AbcLVQPx (ORCPT ); Thu, 22 Dec 2016 11:15:53 -0500 From: Cyrille Pitchen To: , , CC: , , , Cyrille Pitchen Subject: [PATCH 08/12] crypto: atmel-sha: add simple DMA transfers Date: Thu, 22 Dec 2016 17:15:13 +0100 Message-ID: <4c438dc06f85e151dea4a42078d5e1d32d4829c1.1482422983.git.cyrille.pitchen@atmel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-Brightmail-Tracker: H4sIAAAAAAAAC+NgFupmVWLjYuHi8mHRtfgTHWHQ0jn/Da/F4YVTGC0evO9ksZg2/R2zxb1P2xgtOqasYnJgDWCIYs3MS8qvSGDNWH1pC2PBF5mKZYunsDQwdol3MXJxCAmsZ5RYsrKBpYuRk4NNwFDi7YOjrCC2iECgxMKWV4wgRcwC0xklHqx+xw6SEBZwkji/+BwbiM0ioCpxb985sGZegXiJ87+ugNkSAnISN891MoPYnAK2Eo/v3gMbKiRgI/F/5V1WiHpBiZMzn4DVMwtISBx88YIZokYNaPEKZog5gRIfn0+Bsp0knq+7yQZh20kcnn6RHcJ2kOha8Buu5unji1C2tsT2V/tYIWwdiW0H+6Fus5XYM2MiE4TtLvHg0XIo21di1sMGqJooibYlm9kmMErMQnLqLCSnLmBkWsUo7ezhpxscpusa4exhYK6Xm5xRoJubmJmnl5yfu4kRElE5OxgnT/I/xCjJwaQkyrt10vlwIb6k/JTKjMTijPii0pzU4kOMEhw8SiK8/MuAcrzFBYm5xZnpMCkZDg4lCd7HS4FSgkWp6akVaZk5JalFEOlTjJJS4rwfQZICIH0ZpXlwuUuMolLCvFEgOZ6C1KLczBKI+C1GYY6HTEIsefl5qVJAJzIAgQbjK0ZxDkYlYV5pkBt4MvNK4E54BXQdE9B163afBrmuJBEhJdXAqHnp8v89+tdfBFa/3HWpbO+u64Y6066tnWh9csallNabU/LEXfcw3edcuf5JxKzH2/7OjEtUO/3mZgHXPnk3mcMn188Rzz795Vyjy9ETDlJ5fHevfNx/VM5ax/zkYaO6y3Jmm2Xf7WFP7A+OvZb+Tz0g7vYq9sW7zpnN4tlzvTh80eXoXW9yJ85TYinOSDTUYi4qTgQAmzKOXx4DAAA= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds a simple function to perform data transfer with the DMA controller. Signed-off-by: Cyrille Pitchen --- drivers/crypto/atmel-sha.c | 116 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 116 insertions(+) diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index 58d9ca8ac0f2..a4fc60b67099 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -123,6 +123,9 @@ struct atmel_sha_ctx { struct atmel_sha_dma { struct dma_chan *chan; struct dma_slave_config dma_conf; + struct scatterlist *sg; + int nents; + unsigned int last_sg_length; }; struct atmel_sha_dev { @@ -1321,6 +1324,119 @@ static irqreturn_t atmel_sha_irq(int irq, void *dev_id) } +/* DMA transfer functions */ + +static bool atmel_sha_dma_check_aligned(struct atmel_sha_dev *dd, + struct scatterlist *sg, + size_t len) +{ + struct atmel_sha_dma *dma = &dd->dma_lch_in; + struct ahash_request *req = dd->req; + struct atmel_sha_reqctx *ctx = ahash_request_ctx(req); + size_t bs = ctx->block_size; + int nents; + + for (nents = 0; sg; sg = sg_next(sg), ++nents) { + if (!IS_ALIGNED(sg->offset, sizeof(u32))) + return false; + + /* + * This is the last sg, the only one that is allowed to + * have an unaligned length. + */ + if (len <= sg->length) { + dma->nents = nents + 1; + dma->last_sg_length = sg->length; + sg->length = ALIGN(len, sizeof(u32)); + return true; + } + + /* All other sg lengths MUST be aligned to the block size. */ + if (!IS_ALIGNED(sg->length, bs)) + return false; + + len -= sg->length; + } + + return false; +} + +static void atmel_sha_dma_callback2(void *data) +{ + struct atmel_sha_dev *dd = data; + struct atmel_sha_dma *dma = &dd->dma_lch_in; + struct scatterlist *sg; + int nents; + + dmaengine_terminate_all(dma->chan); + dma_unmap_sg(dd->dev, dma->sg, dma->nents, DMA_TO_DEVICE); + + sg = dma->sg; + for (nents = 0; nents < dma->nents - 1; ++nents) + sg = sg_next(sg); + sg->length = dma->last_sg_length; + + dd->is_async = true; + (void)atmel_sha_wait_for_data_ready(dd, dd->resume); +} + +static int atmel_sha_dma_start(struct atmel_sha_dev *dd, + struct scatterlist *src, + size_t len, + atmel_sha_fn_t resume) +{ + struct atmel_sha_dma *dma = &dd->dma_lch_in; + struct dma_slave_config *config = &dma->dma_conf; + struct dma_chan *chan = dma->chan; + struct dma_async_tx_descriptor *desc; + dma_cookie_t cookie; + unsigned int sg_len; + int err; + + dd->resume = resume; + + /* + * dma->nents has already been initialized by + * atmel_sha_dma_check_aligned(). + */ + dma->sg = src; + sg_len = dma_map_sg(dd->dev, dma->sg, dma->nents, DMA_TO_DEVICE); + if (!sg_len) { + err = -ENOMEM; + goto exit; + } + + config->src_maxburst = 16; + config->dst_maxburst = 16; + err = dmaengine_slave_config(chan, config); + if (err) + goto unmap_sg; + + desc = dmaengine_prep_slave_sg(chan, dma->sg, sg_len, DMA_MEM_TO_DEV, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc) { + err = -ENOMEM; + goto unmap_sg; + } + + desc->callback = atmel_sha_dma_callback2; + desc->callback_param = dd; + cookie = dmaengine_submit(desc); + err = dma_submit_error(cookie); + if (err) + goto unmap_sg; + + dma_async_issue_pending(chan); + + return -EINPROGRESS; + +unmap_sg: + dma_unmap_sg(dd->dev, dma->sg, dma->nents, DMA_TO_DEVICE); +exit: + return atmel_sha_complete(dd, err); +} + + /* CPU transfer functions */ static int atmel_sha_cpu_transfer(struct atmel_sha_dev *dd) -- 2.7.4