From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE658C43218 for ; Fri, 26 Apr 2019 15:59:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7AD03208CB for ; Fri, 26 Apr 2019 15:59:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=c-s.fr header.i=@c-s.fr header.b="jTE1IRCS" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726952AbfDZP7A (ORCPT ); Fri, 26 Apr 2019 11:59:00 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:1645 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726451AbfDZP6E (ORCPT ); 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Fri, 26 Apr 2019 17:58:02 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id YbZ5QGnrHNpt; Fri, 26 Apr 2019 17:58:02 +0200 (CEST) Received: from po16846vm.idsi0.si.c-s.fr (po15451.idsi0.si.c-s.fr [172.25.231.6]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 98A7D8B82F; Fri, 26 Apr 2019 17:58:02 +0200 (CEST) Received: by po16846vm.idsi0.si.c-s.fr (Postfix, from userid 0) id 866C5666FE; Fri, 26 Apr 2019 15:58:02 +0000 (UTC) Message-Id: <4f8ba02f8fbd355a140b5c33c8186e2c037a45a1.1556293738.git.christophe.leroy@c-s.fr> In-Reply-To: References: From: Christophe Leroy Subject: [PATCH v2 04/15] powerpc/mm: move pgtable_t in asm/mmu.h To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , aneesh.kumar@linux.ibm.com Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Date: Fri, 26 Apr 2019 15:58:02 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org pgtable_t is now identical for all subarches, move it to the top level asm/mmu.h Reviewed-by: Aneesh Kumar K.V Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/book3s/32/mmu-hash.h | 4 ---- arch/powerpc/include/asm/book3s/64/mmu.h | 8 -------- arch/powerpc/include/asm/mmu.h | 3 +++ arch/powerpc/include/asm/nohash/32/mmu.h | 6 ------ arch/powerpc/include/asm/nohash/64/mmu.h | 6 ------ 5 files changed, 3 insertions(+), 24 deletions(-) diff --git a/arch/powerpc/include/asm/book3s/32/mmu-hash.h b/arch/powerpc/include/asm/book3s/32/mmu-hash.h index f9eae105a9f4..2e277ca0170f 100644 --- a/arch/powerpc/include/asm/book3s/32/mmu-hash.h +++ b/arch/powerpc/include/asm/book3s/32/mmu-hash.h @@ -10,8 +10,6 @@ * BATs */ -#include - /* Block size masks */ #define BL_128K 0x000 #define BL_256K 0x001 @@ -49,8 +47,6 @@ struct ppc_bat { u32 batu; u32 batl; }; - -typedef pte_t *pgtable_t; #endif /* !__ASSEMBLY__ */ /* diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h index 230a9dec7677..d4a94c2b29f2 100644 --- a/arch/powerpc/include/asm/book3s/64/mmu.h +++ b/arch/powerpc/include/asm/book3s/64/mmu.h @@ -25,14 +25,6 @@ struct mmu_psize_def { }; }; extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; - -/* - * For BOOK3s 64 with 4k and 64K linux page size - * we want to use pointers, because the page table - * actually store pfn - */ -typedef pte_t *pgtable_t; - #endif /* __ASSEMBLY__ */ /* diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index d86c5641bd97..ba94ce8c22d7 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h @@ -129,6 +129,9 @@ #ifndef __ASSEMBLY__ #include #include +#include + +typedef pte_t *pgtable_t; #ifdef CONFIG_PPC_FSL_BOOK3E #include diff --git a/arch/powerpc/include/asm/nohash/32/mmu.h b/arch/powerpc/include/asm/nohash/32/mmu.h index 7d94a36d57d2..af0e8b54876a 100644 --- a/arch/powerpc/include/asm/nohash/32/mmu.h +++ b/arch/powerpc/include/asm/nohash/32/mmu.h @@ -2,8 +2,6 @@ #ifndef _ASM_POWERPC_NOHASH_32_MMU_H_ #define _ASM_POWERPC_NOHASH_32_MMU_H_ -#include - #if defined(CONFIG_40x) /* 40x-style software loaded TLB */ #include @@ -18,8 +16,4 @@ #include #endif -#ifndef __ASSEMBLY__ -typedef pte_t *pgtable_t; -#endif - #endif /* _ASM_POWERPC_NOHASH_32_MMU_H_ */ diff --git a/arch/powerpc/include/asm/nohash/64/mmu.h b/arch/powerpc/include/asm/nohash/64/mmu.h index 26e05ce8f5aa..e490ecdac012 100644 --- a/arch/powerpc/include/asm/nohash/64/mmu.h +++ b/arch/powerpc/include/asm/nohash/64/mmu.h @@ -4,13 +4,7 @@ #define MAX_PHYSMEM_BITS 44 -#include - /* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */ #include -#ifndef __ASSEMBLY__ -typedef pte_t *pgtable_t; -#endif - #endif /* _ASM_POWERPC_NOHASH_64_MMU_H_ */ -- 2.13.3