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From: "Tanwar, Rahul" <rahul.tanwar@linux.intel.com>
To: Randy Dunlap <rdunlap@infradead.org>,
	mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
	mark.rutland@arm.com, linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	andriy.shevchenko@intel.com, qi-ming.wu@intel.com,
	yixin.zhu@linux.intel.com, cheol.yong.kim@intel.com,
	rtanwar <rahul.tanwar@intel.com>
Subject: Re: [PATCH v5 2/2] clk: intel: Add CGU clock driver for a new SoC
Date: Thu, 27 Feb 2020 15:19:26 +0800	[thread overview]
Message-ID: <4fb7a643-cbe1-da82-2629-2dbd0c0d143b@linux.intel.com> (raw)
In-Reply-To: <e8259928-cb2a-a453-8f2a-1b57c8abdb8c@infradead.org>


Hi Randy,

On 19/2/2020 3:59 PM, Randy Dunlap wrote:
> On 2/18/20 11:40 PM, Rahul Tanwar wrote:
>> From: rtanwar <rahul.tanwar@intel.com>
>>
>> Clock Generation Unit(CGU) is a new clock controller IP of a forthcoming
>> Intel network processor SoC named Lightning Mountain(LGM). It provides
>> programming interfaces to control & configure all CPU & peripheral clocks.
>> Add common clock framework based clock controller driver for CGU.
>>
>> Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
>> ---
>>  drivers/clk/Kconfig           |   1 +
>>  drivers/clk/x86/Kconfig       |   8 +
>>  drivers/clk/x86/Makefile      |   1 +
>>  drivers/clk/x86/clk-cgu-pll.c | 156 +++++++++++
>>  drivers/clk/x86/clk-cgu.c     | 636 ++++++++++++++++++++++++++++++++++++++++++
>>  drivers/clk/x86/clk-cgu.h     | 335 ++++++++++++++++++++++
>>  drivers/clk/x86/clk-lgm.c     | 492 ++++++++++++++++++++++++++++++++
>>  7 files changed, 1629 insertions(+)
>>  create mode 100644 drivers/clk/x86/Kconfig
>>  create mode 100644 drivers/clk/x86/clk-cgu-pll.c
>>  create mode 100644 drivers/clk/x86/clk-cgu.c
>>  create mode 100644 drivers/clk/x86/clk-cgu.h
>>  create mode 100644 drivers/clk/x86/clk-lgm.c
>>
>> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
>> index bcb257baed06..43dab257e7aa 100644
>> --- a/drivers/clk/Kconfig
>> +++ b/drivers/clk/Kconfig
>> @@ -360,6 +360,7 @@ source "drivers/clk/sunxi-ng/Kconfig"
>>  source "drivers/clk/tegra/Kconfig"
>>  source "drivers/clk/ti/Kconfig"
>>  source "drivers/clk/uniphier/Kconfig"
>> +source "drivers/clk/x86/Kconfig"
>>  source "drivers/clk/zynqmp/Kconfig"
>>  
>>  endmenu
> Hi,
>
>> diff --git a/drivers/clk/x86/Kconfig b/drivers/clk/x86/Kconfig
>> new file mode 100644
>> index 000000000000..2e2b9730541f
>> --- /dev/null
>> +++ b/drivers/clk/x86/Kconfig
>> @@ -0,0 +1,8 @@
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +config CLK_LGM_CGU
>> +	depends on (OF && HAS_IOMEM) || COMPILE_TEST
> This "depends on" looks problematic to me. I guess we shall see when
> all the build bots get to it.

At the moment, i am not able to figure out possible problems in this..

>> +	select OF_EARLY_FLATTREE
> If OF is not set and HAS_IOMEM is not set, but COMPILE_TEST is set,
> I expect that this should not be attempting to select OF_EARLY_FLATTREE.
>
> Have you tried such a config combination?

Agree, that would be a problem. I will change it to

select OF_EARLY_FLATTREE if OF

Thanks.

Regards,
Rahul

  reply	other threads:[~2020-02-27  7:19 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-19  7:40 [PATCH v5 0/2] intel: Add a new driver for a new clock controller IP Rahul Tanwar
2020-02-19  7:40 ` [PATCH v5 1/2] dt-bindings: clk: intel: Add bindings document & header file for CGU Rahul Tanwar
2020-02-19  7:40 ` [PATCH v5 2/2] clk: intel: Add CGU clock driver for a new SoC Rahul Tanwar
2020-02-19  7:59   ` Randy Dunlap
2020-02-27  7:19     ` Tanwar, Rahul [this message]
2020-02-27 10:02       ` Andy Shevchenko
2020-03-03  3:37         ` Tanwar, Rahul
2020-03-03 10:09           ` Andy Shevchenko
2020-03-04  6:18             ` Tanwar, Rahul

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