From: Qi Liu <liuqi115@huawei.com>
To: <acme@kernel.org>, <mingo@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
Andi Kleen <ak@linux.intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
<linux-perf-users@vger.kernel.org>,
Linuxarm <linuxarm@huawei.com>
Subject: Re: [PATCH v2] perf stat: Fix the ratio comments of miss-events
Date: Wed, 6 May 2020 20:24:24 +0800 [thread overview]
Message-ID: <4feb7586-e5a6-6a55-75d9-2fed47dc7c29@huawei.com> (raw)
In-Reply-To: <bac9f132-63c4-df6c-6959-32bc63ac3cdd@huawei.com>
Gentle ping ...
Hi Arnaldo,
If possible, could you give a look for this patch?
Thank you,
Qi Liu
On 2020/5/6 20:01, Qi Liu wrote:
> Perf stat displays miss ratio of L1-dcache, L1-icache, dTLB cache, iTLB cache and LL-cache. Take L1-dcache for example, its miss ratio is caculated as "L1-dcache-load-misses/L1-dcache-loads". So "of all L1-dcache hits" is unsuitable to describe it, and "of all L1-dcache accesses" seems better. The comments of L1-icache, dTLB cache, iTLB cache and LL-cache are fixed in the same way.
>
> Signed-off-by: Qi Liu <liuqi115@huawei.com>
> Reviewed-by: Andi Kleen <ak@linux.intel.com>
> ---
> Changelog
> v2: Fix the format issue
>
> tools/perf/util/stat-shadow.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/tools/perf/util/stat-shadow.c b/tools/perf/util/stat-shadow.c index 2c41d47..28f4470 100644
> --- a/tools/perf/util/stat-shadow.c
> +++ b/tools/perf/util/stat-shadow.c
> @@ -506,7 +506,7 @@ static void print_l1_dcache_misses(struct perf_stat_config *config,
>
> color = get_ratio_color(GRC_CACHE_MISSES, ratio);
>
> - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all L1-dcache hits", ratio);
> + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all +L1-dcache accesses", ratio);
> }
>
> static void print_l1_icache_misses(struct perf_stat_config *config, @@ -527,7 +527,7 @@ static void print_l1_icache_misses(struct perf_stat_config *config,
> ratio = avg / total * 100.0;
>
> color = get_ratio_color(GRC_CACHE_MISSES, ratio);
> - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all L1-icache hits", ratio);
> + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all +L1-icache accesses", ratio);
> }
>
> static void print_dtlb_cache_misses(struct perf_stat_config *config, @@ -547,7 +547,7 @@ static void print_dtlb_cache_misses(struct perf_stat_config *config,
> ratio = avg / total * 100.0;
>
> color = get_ratio_color(GRC_CACHE_MISSES, ratio);
> - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all dTLB cache hits", ratio);
> + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all dTLB +cache accesses", ratio);
> }
>
> static void print_itlb_cache_misses(struct perf_stat_config *config, @@ -567,7 +567,7 @@ static void print_itlb_cache_misses(struct perf_stat_config *config,
> ratio = avg / total * 100.0;
>
> color = get_ratio_color(GRC_CACHE_MISSES, ratio);
> - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all iTLB cache hits", ratio);
> + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all iTLB +cache accesses", ratio);
> }
>
> static void print_ll_cache_misses(struct perf_stat_config *config, @@ -587,7 +587,7 @@ static void print_ll_cache_misses(struct perf_stat_config *config,
> ratio = avg / total * 100.0;
>
> color = get_ratio_color(GRC_CACHE_MISSES, ratio);
> - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all LL-cache hits", ratio);
> + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all LL-cache +accesses", ratio);
> }
>
> /*
> @@ -872,7 +872,7 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config,
> if (runtime_stat_n(st, STAT_L1_DCACHE, ctx, cpu) != 0)
> print_l1_dcache_misses(config, cpu, evsel, avg, out, st);
> else
> - print_metric(config, ctxp, NULL, NULL, "of all L1-dcache hits", 0);
> + print_metric(config, ctxp, NULL, NULL, "of all L1-dcache accesses", +0);
> } else if (
> evsel->core.attr.type == PERF_TYPE_HW_CACHE &&
> evsel->core.attr.config == ( PERF_COUNT_HW_CACHE_L1I | @@ -882,7 +882,7 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config,
> if (runtime_stat_n(st, STAT_L1_ICACHE, ctx, cpu) != 0)
> print_l1_icache_misses(config, cpu, evsel, avg, out, st);
> else
> - print_metric(config, ctxp, NULL, NULL, "of all L1-icache hits", 0);
> + print_metric(config, ctxp, NULL, NULL, "of all L1-icache accesses", +0);
> } else if (
> evsel->core.attr.type == PERF_TYPE_HW_CACHE &&
> evsel->core.attr.config == ( PERF_COUNT_HW_CACHE_DTLB | @@ -892,7 +892,7 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config,
> if (runtime_stat_n(st, STAT_DTLB_CACHE, ctx, cpu) != 0)
> print_dtlb_cache_misses(config, cpu, evsel, avg, out, st);
> else
> - print_metric(config, ctxp, NULL, NULL, "of all dTLB cache hits", 0);
> + print_metric(config, ctxp, NULL, NULL, "of all dTLB cache accesses", +0);
> } else if (
> evsel->core.attr.type == PERF_TYPE_HW_CACHE &&
> evsel->core.attr.config == ( PERF_COUNT_HW_CACHE_ITLB | @@ -902,7 +902,7 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config,
> if (runtime_stat_n(st, STAT_ITLB_CACHE, ctx, cpu) != 0)
> print_itlb_cache_misses(config, cpu, evsel, avg, out, st);
> else
> - print_metric(config, ctxp, NULL, NULL, "of all iTLB cache hits", 0);
> + print_metric(config, ctxp, NULL, NULL, "of all iTLB cache accesses", +0);
> } else if (
> evsel->core.attr.type == PERF_TYPE_HW_CACHE &&
> evsel->core.attr.config == ( PERF_COUNT_HW_CACHE_LL | @@ -912,7 +912,7 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config,
> if (runtime_stat_n(st, STAT_LL_CACHE, ctx, cpu) != 0)
> print_ll_cache_misses(config, cpu, evsel, avg, out, st);
> else
> - print_metric(config, ctxp, NULL, NULL, "of all LL-cache hits", 0);
> + print_metric(config, ctxp, NULL, NULL, "of all LL-cache accesses", +0);
> } else if (perf_evsel__match(evsel, HARDWARE, HW_CACHE_MISSES)) {
> total = runtime_stat_avg(st, STAT_CACHEREFS, ctx, cpu);
>
> --
> 2.8.1
>
>
next parent reply other threads:[~2020-05-06 12:24 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <B82435381E3B2943AA4D2826ADEF0B3A02333ED8@DGGEML522-MBX.china.huawei.com>
[not found] ` <bac9f132-63c4-df6c-6959-32bc63ac3cdd@huawei.com>
2020-05-06 12:24 ` Qi Liu [this message]
2019-12-19 3:00 [PATCH v2] Perf stat: Fix the ratio comments of miss-events Qi Liu
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