From: David Woodhouse <dwmw2@infradead.org>
To: Kim Phillips <kim.phillips@amd.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"usama.arif@bytedance.com" <usama.arif@bytedance.com>,
"arjan@linux.intel.com" <arjan@linux.intel.com>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"Mario.Limonciello@amd.com" <Mario.Limonciello@amd.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"seanjc@google.com" <seanjc@google.com>,
"mingo@redhat.com" <mingo@redhat.com>,
"fam.zheng@bytedance.com" <fam.zheng@bytedance.com>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"liangma@liangbit.com" <liangma@liangbit.com>,
"pmenzel@molgen.mpg.de" <pmenzel@molgen.mpg.de>,
"mimoja@mimoja.de" <mimoja@mimoja.de>,
"hewenliang4@huawei.com" <hewenliang4@huawei.com>,
"hpa@zytor.com" <hpa@zytor.com>,
"punit.agrawal@bytedance.com" <punit.agrawal@bytedance.com>,
"simon.evans@bytedance.com" <simon.evans@bytedance.com>,
"bp@alien8.de" <bp@alien8.de>,
"paulmck@kernel.org" <paulmck@kernel.org>,
"rcu@vger.kernel.org" <rcu@vger.kernel.org>,
"x86@kernel.org" <x86@kernel.org>
Subject: Re: [EXTERNAL][PATCH v6 07/11] x86/smpboot: Disable parallel boot for AMD CPUs
Date: Fri, 03 Feb 2023 22:25:03 +0000 [thread overview]
Message-ID: <503eabcd1bed64ecc54b9af5a4d906251ca024db.camel@infradead.org> (raw)
In-Reply-To: <54fb46ad-10b7-dc87-5723-5437fe5f40a3@amd.com>
[-- Attachment #1: Type: text/plain, Size: 4371 bytes --]
On Fri, 2023-02-03 at 15:45 -0600, Kim Phillips wrote:
> On 2/3/23 2:19 PM, Woodhouse, David wrote:
> > Would be interesting to know if that goes away if you test only the
> > first part of the tree. My first inclination is to suspect that's a bug
> > in the later patches... although the APIC ID mismatch is interesting.
> > That part (with each AP getting its own APIC ID from CPUID) is in the
> > *first* part of the series....
>
> dwmw2/parallel-6.2-rc6-part1 (commit 942b3faa258c) re-enabled for
> AMD gets the same splat(s):
Sure that's the right image? Looks like it still has the timing debug
patch from the last commit in the tree?
> [ 3.195498] smp: Bringing up secondary CPUs ...
> [ 3.196670] x86: Booting SMP configuration:
> [ 3.200189] .... node #0, CPUs: #1
> [ 3.200247] CPU 1 to 93/x86/cpu:kick in 315 42 -155206575216 0 . 0 0 0 0 . 0 155217324423
> [ 3.200418] ------------[ cut here ]------------
> [ 3.200420] WARNING: CPU: 0 PID: 1 at arch/x86/kernel/cpu/common.c:2122 cpu_init+0x2d/0x1f0
> [ 3.200428] Modules linked in:
> [ 3.200430] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 6.2.0-rc6+ #19
> [ 3.200433] Hardware name: AMD Corporation Speedway/Speedway, BIOS RSW1009C 07/27/2018
> [ 3.200435] RIP: 0010:cpu_init+0x2d/0x1f0
> [ 3.200438] Code: e5 41 56 41 55 41 54 53 65 48 8b 1c 25 80 2e 1f 00 65 44 8b 35 20 e4 99 47 48 8b 05 5d f7 51 02 44 89 f2 f0 48 0f ab 10 73 06 <0f> 0b eb 02 f3 90 48 8b 05 3e f7 51 02 48 0f a3 10 73 f1 45 85 f6
> [ 3.200440] RSP: 0000:ffffffffba203d70 EFLAGS: 00010083
> [ 3.200443] RAX: ffff8e027eef6e40 RBX: ffff8dfe80064b80 RCX: 0000000000000008
> [ 3.200444] RDX: 0000000000000000 RSI: ffff8df65c40b048 RDI: ffffffffb9f66418
> [ 3.200445] RBP: ffffffffba203d90 R08: 00000000fffffe4d R09: ffff8df65c406078
> [ 3.200446] R10: ffffffffba203dc0 R11: 0000000000000000 R12: 0000000000000000
> [ 3.200447] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000
> [ 3.200448] FS: 0000000000000000(0000) GS:ffff8df65c400000(0000) knlGS:0000000000000000
> [ 3.200450] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> [ 3.200451] CR2: 0000000000000000 CR3: 0000800307e12000 CR4: 00000000003100a0
> [ 3.200453] Call Trace:
> [ 3.200454] ---[ end trace 0000000000000000 ]---
> [ 3.200509] [Firmware Bug]: CPU0: APIC id mismatch. Firmware: 0 APIC: 2
> [ 3.284620] #2
> [ 3.284669] CPU 2 to 93/x86/cpu:kick in 252 42 -155547668514 0 . 0 0 0 0 . 0 155548597197
> [ 3.284727] ------------[ cut here ]------------
> [ 3.284732] WARNING: CPU: 0 PID: 1 at arch/x86/kernel/cpu/common.c:2122 cpu_init+0x2d/0x1f0
> [ 3.284741] Modules linked in:
> [ 3.284745] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 6.2.0-rc6+ #19
> [ 3.284749] Hardware name: AMD Corporation Speedway/Speedway, BIOS RSW1009C 07/27/2018
> [ 3.284752] RIP: 0010:cpu_init+0x2d/0x1f0
> [ 3.284756] Code: e5 41 56 41 55 41 54 53 65 48 8b 1c 25 80 2e 1f 00 65 44 8b 35 20 e4 99 47 48 8b 05 5d f7 51 02 44 89 f2 f0 48 0f ab 10 73 06 <0f> 0b eb 02 f3 90 48 8b 05 3e f7 51 02 48 0f a3 10 73 f1 45 85 f6
> [ 3.284760] RSP: 0000:ffffffffba203d70 EFLAGS: 00010083
> [ 3.284764] RAX: ffff8e027eef6e40 RBX: ffff8dfe80064b80 RCX: 0000000000000008
> [ 3.284766] RDX: 0000000000000000 RSI: ffff8df65c40b048 RDI: ffffffffb9f66418
> [ 3.284769] RBP: ffffffffba203d90 R08: 00000000fffffe4d R09: ffff8df65c406078
> [ 3.284771] R10: ffffffffba203dc0 R11: 0000000000000000 R12: 0000000000000000
> [ 3.284773] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000
> [ 3.284775] FS: 0000000000000000(0000) GS:ffff8df65c400000(0000) knlGS:0000000000000000
> [ 3.284778] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> [ 3.284779] CR2: 0000000000000000 CR3: 0000800307e12000 CR4: 00000000003100a0
> [ 3.284781] Call Trace:
> [ 3.284783] ---[ end trace 0000000000000000 ]---
> [ 3.284841] [Firmware Bug]: CPU0: APIC id mismatch. Firmware: 0 APIC: 8
> [ 3.364[[ [. 343 35 5 5] [ 3 364575 [
> 3 [ [ [3 3 [ [ 3
>
> Thanks,
>
> Kim
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next prev parent reply other threads:[~2023-02-03 22:25 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-02 21:56 [PATCH v6 00/11] Parallel CPU bringup for x86_64 Usama Arif
2023-02-02 21:56 ` [PATCH v6 01/11] x86/apic/x2apic: Fix parallel handling of cluster_mask Usama Arif
2023-02-06 23:20 ` Thomas Gleixner
2023-02-07 10:57 ` David Woodhouse
2023-02-07 11:27 ` David Woodhouse
2023-02-07 14:24 ` Thomas Gleixner
2023-02-07 19:53 ` David Woodhouse
2023-02-07 20:58 ` Thomas Gleixner
2023-02-07 14:22 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 02/11] cpu/hotplug: Move idle_thread_get() to <linux/smpboot.h> Usama Arif
2023-02-06 23:33 ` Thomas Gleixner
2023-02-07 1:24 ` Paul E. McKenney
2023-02-02 21:56 ` [PATCH v6 03/11] cpu/hotplug: Add dynamic parallel bringup states before CPUHP_BRINGUP_CPU Usama Arif
2023-02-06 23:43 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 04/11] x86/smpboot: Reference count on smpboot_setup_warm_reset_vector() Usama Arif
2023-02-06 23:48 ` Thomas Gleixner
[not found] ` <57195f701f6d1d70ec440c9a28cbee4cfb81dc41.camel@amazon.co.uk>
2023-02-07 14:39 ` Thomas Gleixner
2023-02-07 16:50 ` Sean Christopherson
2023-02-07 19:48 ` [EXTERNAL][PATCH " David Woodhouse
2023-02-02 21:56 ` [PATCH v6 05/11] x86/smpboot: Split up native_cpu_up into separate phases and document them Usama Arif
2023-02-06 23:59 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 06/11] x86/smpboot: Support parallel startup of secondary CPUs Usama Arif
2023-02-02 22:30 ` David Woodhouse
2023-02-02 22:50 ` [External] " Usama Arif
2023-02-03 8:14 ` David Woodhouse
2023-02-03 14:41 ` Arjan van de Ven
2023-02-03 18:17 ` Sean Christopherson
2023-02-07 0:07 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 07/11] x86/smpboot: Disable parallel boot for AMD CPUs Usama Arif
2023-02-03 19:48 ` Kim Phillips
[not found] ` <d5ec64236ba75f0d3f3718fb69b2cb9169d8af0a.camel@amazon.co.uk>
2023-02-03 21:45 ` Kim Phillips
2023-02-03 22:25 ` David Woodhouse [this message]
2023-02-04 9:07 ` David Woodhouse
2023-02-04 10:09 ` David Woodhouse
2023-02-04 15:40 ` David Woodhouse
2023-02-04 18:18 ` Arjan van de Ven
2023-02-04 22:31 ` David Woodhouse
2023-02-05 22:13 ` [External] " Usama Arif
2023-02-06 8:05 ` David Woodhouse
2023-02-06 12:11 ` Usama Arif
2023-02-06 18:07 ` Sean Christopherson
2023-02-06 17:58 ` Kim Phillips
2023-02-07 16:27 ` Kim Phillips
2023-02-07 0:23 ` Thomas Gleixner
2023-02-07 10:04 ` David Woodhouse
2023-02-07 14:44 ` Thomas Gleixner
2023-02-07 0:09 ` Thomas Gleixner
[not found] ` <cbd9e88e738dc0c479e87121ca82431731905c73.camel@amazon.co.uk>
2023-02-07 14:46 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 08/11] x86/smpboot: Send INIT/SIPI/SIPI to secondary CPUs in parallel Usama Arif
2023-02-07 0:28 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 09/11] x86/mtrr: Avoid repeated save of MTRRs on boot-time CPU bringup Usama Arif
2023-02-02 21:56 ` [PATCH v6 10/11] x86/smpboot: Serialize topology updates for secondary bringup Usama Arif
2023-02-02 21:56 ` [PATCH v6 11/11] x86/smpboot: reuse timer calibration Usama Arif
2023-02-07 0:31 ` Thomas Gleixner
2023-02-07 23:16 ` Arjan van de Ven
2023-02-07 23:55 ` Thomas Gleixner
2023-02-05 19:17 ` [PATCH v6 00/11] Parallel CPU bringup for x86_64 Russ Anderson
2023-02-06 8:28 ` David Woodhouse
2023-02-06 12:18 ` [External] " Usama Arif
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