linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
@ 2012-09-03 14:02 Shubhrajyoti D
  2012-09-03 14:05 ` Shubhrajyoti
  0 siblings, 1 reply; 9+ messages in thread
From: Shubhrajyoti D @ 2012-09-03 14:02 UTC (permalink / raw)
  To: spi-devel-general; +Cc: linux-omap, linux-kernel, Shubhrajyoti D

Currently in omap2_mcspi_txrx_dma has the rx and the rx support
interleaved. Make the rx related code in omap2_mcspi_rx_dma
and the tx related code omap2_mcspi_tx_dma and call functions.

While at it also remove the braces in the if statements which has only
one line.
Also fix ["foo * bar" to "foo *bar"] warn for the rx and tx variables.

Only a cleanup no functional change.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
---
 drivers/spi/spi-omap2-mcspi.c |  256 +++++++++++++++++++++++------------------
 1 files changed, 144 insertions(+), 112 deletions(-)

diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 1c1dd34..dd8fc88 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -315,49 +315,27 @@ static void omap2_mcspi_tx_callback(void *data)
 	omap2_mcspi_set_dma_req(spi, 0, 0);
 }
 
-static unsigned
-omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
+static void omap2_mcspi_tx_dma(struct spi_device *spi,
+				struct spi_transfer *xfer,
+				struct dma_slave_config cfg)
 {
 	struct omap2_mcspi	*mcspi;
-	struct omap2_mcspi_cs	*cs = spi->controller_state;
 	struct omap2_mcspi_dma  *mcspi_dma;
 	unsigned int		count;
-	int			word_len, element_count;
-	int			elements = 0;
-	u32			l;
 	u8			* rx;
 	const u8		* tx;
 	void __iomem		*chstat_reg;
-	struct dma_slave_config	cfg;
-	enum dma_slave_buswidth width;
-	unsigned es;
+	struct omap2_mcspi_cs	*cs = spi->controller_state;
 
 	mcspi = spi_master_get_devdata(spi->master);
 	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
-	l = mcspi_cached_chconf0(spi);
+	count = xfer->len;
 
+	rx = xfer->rx_buf;
+	tx = xfer->tx_buf;
 	chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0;
 
-	if (cs->word_len <= 8) {
-		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
-		es = 1;
-	} else if (cs->word_len <= 16) {
-		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
-		es = 2;
-	} else {
-		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-		es = 4;
-	}
-
-	memset(&cfg, 0, sizeof(cfg));
-	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
-	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
-	cfg.src_addr_width = width;
-	cfg.dst_addr_width = width;
-	cfg.src_maxburst = 1;
-	cfg.dst_maxburst = 1;
-
-	if (xfer->tx_buf && mcspi_dma->dma_tx) {
+	if (mcspi_dma->dma_tx) {
 		struct dma_async_tx_descriptor *tx;
 		struct scatterlist sg;
 
@@ -368,7 +346,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 		sg_dma_len(&sg) = xfer->len;
 
 		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_tx, &sg, 1,
-			DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+		DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 		if (tx) {
 			tx->callback = omap2_mcspi_tx_callback;
 			tx->callback_param = spi;
@@ -377,8 +355,50 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 			/* FIXME: fall back to PIO? */
 		}
 	}
+	dma_async_issue_pending(mcspi_dma->dma_tx);
+	omap2_mcspi_set_dma_req(spi, 0, 1);
 
-	if (xfer->rx_buf && mcspi_dma->dma_rx) {
+	wait_for_completion(&mcspi_dma->dma_tx_completion);
+	dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
+			 DMA_TO_DEVICE);
+
+	/* for TX_ONLY mode, be sure all words have shifted out */
+	if (rx == NULL) {
+		if (mcspi_wait_for_reg_bit(chstat_reg,
+					OMAP2_MCSPI_CHSTAT_TXS) < 0)
+			dev_err(&spi->dev, "TXS timed out\n");
+		else if (mcspi_wait_for_reg_bit(chstat_reg,
+					OMAP2_MCSPI_CHSTAT_EOT) < 0)
+			dev_err(&spi->dev, "EOT timed out\n");
+	}
+}
+
+static unsigned
+omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer,
+				struct dma_slave_config cfg,
+				unsigned es)
+{
+	struct omap2_mcspi	*mcspi;
+	struct omap2_mcspi_dma  *mcspi_dma;
+	unsigned int		count;
+	u32			l;
+	int			elements = 0;
+	int			word_len, element_count;
+	struct omap2_mcspi_cs	*cs = spi->controller_state;
+	mcspi = spi_master_get_devdata(spi->master);
+	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
+	count = xfer->len;
+	word_len = cs->word_len;
+	l = mcspi_cached_chconf0(spi);
+
+	if (word_len <= 8)
+		element_count = count;
+	else if (word_len <= 16)
+		element_count = count >> 1;
+	else /* word_len <= 32 */
+		element_count = count >> 2;
+
+	if (mcspi_dma->dma_rx) {
 		struct dma_async_tx_descriptor *tx;
 		struct scatterlist sg;
 		size_t len = xfer->len - es;
@@ -393,108 +413,120 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 		sg_dma_len(&sg) = len;
 
 		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, &sg, 1,
-			DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+				DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT |
+				DMA_CTRL_ACK);
 		if (tx) {
 			tx->callback = omap2_mcspi_rx_callback;
 			tx->callback_param = spi;
 			dmaengine_submit(tx);
 		} else {
-			/* FIXME: fall back to PIO? */
-		}
-	}
-
-	count = xfer->len;
-	word_len = cs->word_len;
-
-	rx = xfer->rx_buf;
-	tx = xfer->tx_buf;
-
-	if (word_len <= 8) {
-		element_count = count;
-	} else if (word_len <= 16) {
-		element_count = count >> 1;
-	} else /* word_len <= 32 */ {
-		element_count = count >> 2;
-	}
-
-	if (tx != NULL) {
-		dma_async_issue_pending(mcspi_dma->dma_tx);
-		omap2_mcspi_set_dma_req(spi, 0, 1);
-	}
-
-	if (rx != NULL) {
-		dma_async_issue_pending(mcspi_dma->dma_rx);
-		omap2_mcspi_set_dma_req(spi, 1, 1);
-	}
-
-	if (tx != NULL) {
-		wait_for_completion(&mcspi_dma->dma_tx_completion);
-		dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
-				 DMA_TO_DEVICE);
-
-		/* for TX_ONLY mode, be sure all words have shifted out */
-		if (rx == NULL) {
-			if (mcspi_wait_for_reg_bit(chstat_reg,
-						OMAP2_MCSPI_CHSTAT_TXS) < 0)
-				dev_err(&spi->dev, "TXS timed out\n");
-			else if (mcspi_wait_for_reg_bit(chstat_reg,
-						OMAP2_MCSPI_CHSTAT_EOT) < 0)
-				dev_err(&spi->dev, "EOT timed out\n");
+				/* FIXME: fall back to PIO? */
 		}
 	}
 
-	if (rx != NULL) {
-		wait_for_completion(&mcspi_dma->dma_rx_completion);
-		dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
-				 DMA_FROM_DEVICE);
-		omap2_mcspi_set_enable(spi, 0);
+	dma_async_issue_pending(mcspi_dma->dma_rx);
+	omap2_mcspi_set_dma_req(spi, 1, 1);
 
-		elements = element_count - 1;
+	wait_for_completion(&mcspi_dma->dma_rx_completion);
+	dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
+			 DMA_FROM_DEVICE);
+	omap2_mcspi_set_enable(spi, 0);
 
-		if (l & OMAP2_MCSPI_CHCONF_TURBO) {
-			elements--;
+	elements = element_count - 1;
 
-			if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
-				   & OMAP2_MCSPI_CHSTAT_RXS)) {
-				u32 w;
-
-				w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
-				if (word_len <= 8)
-					((u8 *)xfer->rx_buf)[elements++] = w;
-				else if (word_len <= 16)
-					((u16 *)xfer->rx_buf)[elements++] = w;
-				else /* word_len <= 32 */
-					((u32 *)xfer->rx_buf)[elements++] = w;
-			} else {
-				dev_err(&spi->dev,
-					"DMA RX penultimate word empty");
-				count -= (word_len <= 8)  ? 2 :
-					(word_len <= 16) ? 4 :
-					/* word_len <= 32 */ 8;
-				omap2_mcspi_set_enable(spi, 1);
-				return count;
-			}
-		}
+	if (l & OMAP2_MCSPI_CHCONF_TURBO) {
+		elements--;
 
 		if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
-				& OMAP2_MCSPI_CHSTAT_RXS)) {
+				   & OMAP2_MCSPI_CHSTAT_RXS)) {
 			u32 w;
 
 			w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
 			if (word_len <= 8)
-				((u8 *)xfer->rx_buf)[elements] = w;
+				((u8 *)xfer->rx_buf)[elements++] = w;
 			else if (word_len <= 16)
-				((u16 *)xfer->rx_buf)[elements] = w;
+				((u16 *)xfer->rx_buf)[elements++] = w;
 			else /* word_len <= 32 */
-				((u32 *)xfer->rx_buf)[elements] = w;
+				((u32 *)xfer->rx_buf)[elements++] = w;
 		} else {
-			dev_err(&spi->dev, "DMA RX last word empty");
-			count -= (word_len <= 8)  ? 1 :
-				 (word_len <= 16) ? 2 :
-			       /* word_len <= 32 */ 4;
+			dev_err(&spi->dev, "DMA RX penultimate word empty");
+			count -= (word_len <= 8)  ? 2 :
+				(word_len <= 16) ? 4 :
+				/* word_len <= 32 */ 8;
+			omap2_mcspi_set_enable(spi, 1);
+			return count;
 		}
-		omap2_mcspi_set_enable(spi, 1);
 	}
+	if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
+				& OMAP2_MCSPI_CHSTAT_RXS)) {
+		u32 w;
+
+		w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
+		if (word_len <= 8)
+			((u8 *)xfer->rx_buf)[elements] = w;
+		else if (word_len <= 16)
+			((u16 *)xfer->rx_buf)[elements] = w;
+		else /* word_len <= 32 */
+			((u32 *)xfer->rx_buf)[elements] = w;
+	} else {
+		dev_err(&spi->dev, "DMA RX last word empty");
+		count -= (word_len <= 8)  ? 1 :
+			 (word_len <= 16) ? 2 :
+		       /* word_len <= 32 */ 4;
+	}
+	omap2_mcspi_set_enable(spi, 1);
+	return count;
+}
+
+static unsigned
+omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
+{
+	struct omap2_mcspi	*mcspi;
+	struct omap2_mcspi_cs	*cs = spi->controller_state;
+	struct omap2_mcspi_dma  *mcspi_dma;
+	unsigned int		count;
+	u32			l;
+	u8			*rx;
+	const u8		*tx;
+	struct dma_slave_config	cfg;
+	enum dma_slave_buswidth width;
+	unsigned es;
+
+	mcspi = spi_master_get_devdata(spi->master);
+	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
+	l = mcspi_cached_chconf0(spi);
+
+
+	if (cs->word_len <= 8) {
+		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+		es = 1;
+	} else if (cs->word_len <= 16) {
+		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+		es = 2;
+	} else {
+		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+		es = 4;
+	}
+
+	memset(&cfg, 0, sizeof(cfg));
+	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
+	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
+	cfg.src_addr_width = width;
+	cfg.dst_addr_width = width;
+	cfg.src_maxburst = 1;
+	cfg.dst_maxburst = 1;
+
+	rx = xfer->rx_buf;
+	tx = xfer->tx_buf;
+
+	count = xfer->len;
+
+	if (tx != NULL)
+		omap2_mcspi_tx_dma(spi, xfer, cfg);
+
+	if (rx != NULL)
+		return omap2_mcspi_rx_dma(spi, xfer, cfg, es);
+
 	return count;
 }
 
-- 
1.7.5.4


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
  2012-09-03 14:02 [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function Shubhrajyoti D
@ 2012-09-03 14:05 ` Shubhrajyoti
  0 siblings, 0 replies; 9+ messages in thread
From: Shubhrajyoti @ 2012-09-03 14:05 UTC (permalink / raw)
  To: Shubhrajyoti D; +Cc: spi-devel-general, linux-omap, linux-kernel

On Monday 03 September 2012 07:32 PM, Shubhrajyoti D wrote:
> Currently in omap2_mcspi_txrx_dma has the rx 
I meant tx here will resend. please ignore this patch

> and the rx support
> interleaved. Make the rx related code in omap2_mcspi_rx_dma
> and the tx related code omap2_mcspi_tx_dma and call functions.
>
> While at it also remove the braces in the if statements which has only
> one line.
> Also fix ["foo * bar" to "foo *bar"] warn for the rx and tx variables.
>
> Only a cleanup no functional change.
>
> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
> ---
>  drivers/spi/spi-omap2-mcspi.c |  256 +++++++++++++++++++++++------------------
>  1 files changed, 144 insertions(+), 112 deletions(-)
>
> diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
> index 1c1dd34..dd8fc88 100644
> --- a/drivers/spi/spi-omap2-mcspi.c
> +++ b/drivers/spi/spi-omap2-mcspi.c
> @@ -315,49 +315,27 @@ static void omap2_mcspi_tx_callback(void *data)
>  	omap2_mcspi_set_dma_req(spi, 0, 0);
>  }
>  
> -static unsigned
> -omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
> +static void omap2_mcspi_tx_dma(struct spi_device *spi,
> +				struct spi_transfer *xfer,
> +				struct dma_slave_config cfg)
>  {
>  	struct omap2_mcspi	*mcspi;
> -	struct omap2_mcspi_cs	*cs = spi->controller_state;
>  	struct omap2_mcspi_dma  *mcspi_dma;
>  	unsigned int		count;
> -	int			word_len, element_count;
> -	int			elements = 0;
> -	u32			l;
>  	u8			* rx;
>  	const u8		* tx;
>  	void __iomem		*chstat_reg;
> -	struct dma_slave_config	cfg;
> -	enum dma_slave_buswidth width;
> -	unsigned es;
> +	struct omap2_mcspi_cs	*cs = spi->controller_state;
>  
>  	mcspi = spi_master_get_devdata(spi->master);
>  	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
> -	l = mcspi_cached_chconf0(spi);
> +	count = xfer->len;
>  
> +	rx = xfer->rx_buf;
> +	tx = xfer->tx_buf;
>  	chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0;
>  
> -	if (cs->word_len <= 8) {
> -		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
> -		es = 1;
> -	} else if (cs->word_len <= 16) {
> -		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> -		es = 2;
> -	} else {
> -		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
> -		es = 4;
> -	}
> -
> -	memset(&cfg, 0, sizeof(cfg));
> -	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
> -	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
> -	cfg.src_addr_width = width;
> -	cfg.dst_addr_width = width;
> -	cfg.src_maxburst = 1;
> -	cfg.dst_maxburst = 1;
> -
> -	if (xfer->tx_buf && mcspi_dma->dma_tx) {
> +	if (mcspi_dma->dma_tx) {
>  		struct dma_async_tx_descriptor *tx;
>  		struct scatterlist sg;
>  
> @@ -368,7 +346,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
>  		sg_dma_len(&sg) = xfer->len;
>  
>  		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_tx, &sg, 1,
> -			DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> +		DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
>  		if (tx) {
>  			tx->callback = omap2_mcspi_tx_callback;
>  			tx->callback_param = spi;
> @@ -377,8 +355,50 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
>  			/* FIXME: fall back to PIO? */
>  		}
>  	}
> +	dma_async_issue_pending(mcspi_dma->dma_tx);
> +	omap2_mcspi_set_dma_req(spi, 0, 1);
>  
> -	if (xfer->rx_buf && mcspi_dma->dma_rx) {
> +	wait_for_completion(&mcspi_dma->dma_tx_completion);
> +	dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
> +			 DMA_TO_DEVICE);
> +
> +	/* for TX_ONLY mode, be sure all words have shifted out */
> +	if (rx == NULL) {
> +		if (mcspi_wait_for_reg_bit(chstat_reg,
> +					OMAP2_MCSPI_CHSTAT_TXS) < 0)
> +			dev_err(&spi->dev, "TXS timed out\n");
> +		else if (mcspi_wait_for_reg_bit(chstat_reg,
> +					OMAP2_MCSPI_CHSTAT_EOT) < 0)
> +			dev_err(&spi->dev, "EOT timed out\n");
> +	}
> +}
> +
> +static unsigned
> +omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer,
> +				struct dma_slave_config cfg,
> +				unsigned es)
> +{
> +	struct omap2_mcspi	*mcspi;
> +	struct omap2_mcspi_dma  *mcspi_dma;
> +	unsigned int		count;
> +	u32			l;
> +	int			elements = 0;
> +	int			word_len, element_count;
> +	struct omap2_mcspi_cs	*cs = spi->controller_state;
> +	mcspi = spi_master_get_devdata(spi->master);
> +	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
> +	count = xfer->len;
> +	word_len = cs->word_len;
> +	l = mcspi_cached_chconf0(spi);
> +
> +	if (word_len <= 8)
> +		element_count = count;
> +	else if (word_len <= 16)
> +		element_count = count >> 1;
> +	else /* word_len <= 32 */
> +		element_count = count >> 2;
> +
> +	if (mcspi_dma->dma_rx) {
>  		struct dma_async_tx_descriptor *tx;
>  		struct scatterlist sg;
>  		size_t len = xfer->len - es;
> @@ -393,108 +413,120 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
>  		sg_dma_len(&sg) = len;
>  
>  		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, &sg, 1,
> -			DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> +				DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT |
> +				DMA_CTRL_ACK);
>  		if (tx) {
>  			tx->callback = omap2_mcspi_rx_callback;
>  			tx->callback_param = spi;
>  			dmaengine_submit(tx);
>  		} else {
> -			/* FIXME: fall back to PIO? */
> -		}
> -	}
> -
> -	count = xfer->len;
> -	word_len = cs->word_len;
> -
> -	rx = xfer->rx_buf;
> -	tx = xfer->tx_buf;
> -
> -	if (word_len <= 8) {
> -		element_count = count;
> -	} else if (word_len <= 16) {
> -		element_count = count >> 1;
> -	} else /* word_len <= 32 */ {
> -		element_count = count >> 2;
> -	}
> -
> -	if (tx != NULL) {
> -		dma_async_issue_pending(mcspi_dma->dma_tx);
> -		omap2_mcspi_set_dma_req(spi, 0, 1);
> -	}
> -
> -	if (rx != NULL) {
> -		dma_async_issue_pending(mcspi_dma->dma_rx);
> -		omap2_mcspi_set_dma_req(spi, 1, 1);
> -	}
> -
> -	if (tx != NULL) {
> -		wait_for_completion(&mcspi_dma->dma_tx_completion);
> -		dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
> -				 DMA_TO_DEVICE);
> -
> -		/* for TX_ONLY mode, be sure all words have shifted out */
> -		if (rx == NULL) {
> -			if (mcspi_wait_for_reg_bit(chstat_reg,
> -						OMAP2_MCSPI_CHSTAT_TXS) < 0)
> -				dev_err(&spi->dev, "TXS timed out\n");
> -			else if (mcspi_wait_for_reg_bit(chstat_reg,
> -						OMAP2_MCSPI_CHSTAT_EOT) < 0)
> -				dev_err(&spi->dev, "EOT timed out\n");
> +				/* FIXME: fall back to PIO? */
>  		}
>  	}
>  
> -	if (rx != NULL) {
> -		wait_for_completion(&mcspi_dma->dma_rx_completion);
> -		dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
> -				 DMA_FROM_DEVICE);
> -		omap2_mcspi_set_enable(spi, 0);
> +	dma_async_issue_pending(mcspi_dma->dma_rx);
> +	omap2_mcspi_set_dma_req(spi, 1, 1);
>  
> -		elements = element_count - 1;
> +	wait_for_completion(&mcspi_dma->dma_rx_completion);
> +	dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
> +			 DMA_FROM_DEVICE);
> +	omap2_mcspi_set_enable(spi, 0);
>  
> -		if (l & OMAP2_MCSPI_CHCONF_TURBO) {
> -			elements--;
> +	elements = element_count - 1;
>  
> -			if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
> -				   & OMAP2_MCSPI_CHSTAT_RXS)) {
> -				u32 w;
> -
> -				w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
> -				if (word_len <= 8)
> -					((u8 *)xfer->rx_buf)[elements++] = w;
> -				else if (word_len <= 16)
> -					((u16 *)xfer->rx_buf)[elements++] = w;
> -				else /* word_len <= 32 */
> -					((u32 *)xfer->rx_buf)[elements++] = w;
> -			} else {
> -				dev_err(&spi->dev,
> -					"DMA RX penultimate word empty");
> -				count -= (word_len <= 8)  ? 2 :
> -					(word_len <= 16) ? 4 :
> -					/* word_len <= 32 */ 8;
> -				omap2_mcspi_set_enable(spi, 1);
> -				return count;
> -			}
> -		}
> +	if (l & OMAP2_MCSPI_CHCONF_TURBO) {
> +		elements--;
>  
>  		if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
> -				& OMAP2_MCSPI_CHSTAT_RXS)) {
> +				   & OMAP2_MCSPI_CHSTAT_RXS)) {
>  			u32 w;
>  
>  			w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
>  			if (word_len <= 8)
> -				((u8 *)xfer->rx_buf)[elements] = w;
> +				((u8 *)xfer->rx_buf)[elements++] = w;
>  			else if (word_len <= 16)
> -				((u16 *)xfer->rx_buf)[elements] = w;
> +				((u16 *)xfer->rx_buf)[elements++] = w;
>  			else /* word_len <= 32 */
> -				((u32 *)xfer->rx_buf)[elements] = w;
> +				((u32 *)xfer->rx_buf)[elements++] = w;
>  		} else {
> -			dev_err(&spi->dev, "DMA RX last word empty");
> -			count -= (word_len <= 8)  ? 1 :
> -				 (word_len <= 16) ? 2 :
> -			       /* word_len <= 32 */ 4;
> +			dev_err(&spi->dev, "DMA RX penultimate word empty");
> +			count -= (word_len <= 8)  ? 2 :
> +				(word_len <= 16) ? 4 :
> +				/* word_len <= 32 */ 8;
> +			omap2_mcspi_set_enable(spi, 1);
> +			return count;
>  		}
> -		omap2_mcspi_set_enable(spi, 1);
>  	}
> +	if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
> +				& OMAP2_MCSPI_CHSTAT_RXS)) {
> +		u32 w;
> +
> +		w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
> +		if (word_len <= 8)
> +			((u8 *)xfer->rx_buf)[elements] = w;
> +		else if (word_len <= 16)
> +			((u16 *)xfer->rx_buf)[elements] = w;
> +		else /* word_len <= 32 */
> +			((u32 *)xfer->rx_buf)[elements] = w;
> +	} else {
> +		dev_err(&spi->dev, "DMA RX last word empty");
> +		count -= (word_len <= 8)  ? 1 :
> +			 (word_len <= 16) ? 2 :
> +		       /* word_len <= 32 */ 4;
> +	}
> +	omap2_mcspi_set_enable(spi, 1);
> +	return count;
> +}
> +
> +static unsigned
> +omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
> +{
> +	struct omap2_mcspi	*mcspi;
> +	struct omap2_mcspi_cs	*cs = spi->controller_state;
> +	struct omap2_mcspi_dma  *mcspi_dma;
> +	unsigned int		count;
> +	u32			l;
> +	u8			*rx;
> +	const u8		*tx;
> +	struct dma_slave_config	cfg;
> +	enum dma_slave_buswidth width;
> +	unsigned es;
> +
> +	mcspi = spi_master_get_devdata(spi->master);
> +	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
> +	l = mcspi_cached_chconf0(spi);
> +
> +
> +	if (cs->word_len <= 8) {
> +		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
> +		es = 1;
> +	} else if (cs->word_len <= 16) {
> +		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> +		es = 2;
> +	} else {
> +		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
> +		es = 4;
> +	}
> +
> +	memset(&cfg, 0, sizeof(cfg));
> +	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
> +	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
> +	cfg.src_addr_width = width;
> +	cfg.dst_addr_width = width;
> +	cfg.src_maxburst = 1;
> +	cfg.dst_maxburst = 1;
> +
> +	rx = xfer->rx_buf;
> +	tx = xfer->tx_buf;
> +
> +	count = xfer->len;
> +
> +	if (tx != NULL)
> +		omap2_mcspi_tx_dma(spi, xfer, cfg);
> +
> +	if (rx != NULL)
> +		return omap2_mcspi_rx_dma(spi, xfer, cfg, es);
> +
>  	return count;
>  }
>  


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
  2012-09-11  6:43 Shubhrajyoti D
  2012-09-12  3:21 ` Mark Brown
  2012-09-12 13:39 ` Felipe Balbi
@ 2012-09-12 13:52 ` Mark Brown
  2 siblings, 0 replies; 9+ messages in thread
From: Mark Brown @ 2012-09-12 13:52 UTC (permalink / raw)
  To: Shubhrajyoti D; +Cc: spi-devel-general, grant.likely, linux-omap, linux-kernel

On Tue, Sep 11, 2012 at 12:13:20PM +0530, Shubhrajyoti D wrote:
> Currently in omap2_mcspi_txrx_dma the tx and the rx support is
> interleaved. Make the rx related code in omap2_mcspi_rx_dma
> and the tx related code omap2_mcspi_tx_dma and call the functions.

Applied, thanks.

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
  2012-09-12 13:39 ` Felipe Balbi
@ 2012-09-12 13:48   ` Shubhrajyoti
  0 siblings, 0 replies; 9+ messages in thread
From: Shubhrajyoti @ 2012-09-12 13:48 UTC (permalink / raw)
  To: balbi; +Cc: spi-devel-general, broonie, grant.likely, linux-omap, linux-kernel

On Wednesday 12 September 2012 07:09 PM, Felipe Balbi wrote:
> seems to be working fine (at least from my quick tests)
>
> Tested-by: Felipe Balbi <balbi@ti.com>
Thanks Felipe.

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
  2012-09-11  6:43 Shubhrajyoti D
  2012-09-12  3:21 ` Mark Brown
@ 2012-09-12 13:39 ` Felipe Balbi
  2012-09-12 13:48   ` Shubhrajyoti
  2012-09-12 13:52 ` Mark Brown
  2 siblings, 1 reply; 9+ messages in thread
From: Felipe Balbi @ 2012-09-12 13:39 UTC (permalink / raw)
  To: Shubhrajyoti D
  Cc: spi-devel-general, broonie, grant.likely, linux-omap, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 11762 bytes --]

On Tue, Sep 11, 2012 at 12:13:20PM +0530, Shubhrajyoti D wrote:
> Currently in omap2_mcspi_txrx_dma the tx and the rx support is
> interleaved. Make the rx related code in omap2_mcspi_rx_dma
> and the tx related code omap2_mcspi_tx_dma and call the functions.
> 
> While at it remove the braces in the if statements which has only
> one line.
> Also fix ["foo * bar" to "foo *bar"] warn for the rx and tx variables.
> 
> Only a cleanup no functional change.
> 
> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>

I just tested this on my pandaboard by shorting out MISO and MOSI (since
panda doesn't have any clients on spi bus) and using spidev:

#  ./spidev_test -D /dev/spidev
spi mode: 0
bits per word: 8
max speed: 500000 Hz (500 KHz)

FF FF FF FF FF FF 
40 00 00 00 00 95 
FF FF FF FF FF FF 
FF FF FF FF FF FF 
FF FF FF FF FF FF 
DE AD BE EF BA AD 
F0 0D

./spidev_test -D /dev/spidev -s 24000000
spi mode: 0
bits per word: 8
max speed: 24000000 Hz (24000 KHz)

FF FF FF FF FF FF 
40 00 00 00 00 95 
FF FF FF FF FF FF 
FF FF FF FF FF FF 
FF FF FF FF FF FF 
DE AD BE EF BA AD 
F0 0D

seems to be working fine (at least from my quick tests)

Tested-by: Felipe Balbi <balbi@ti.com>

> ---
>  drivers/spi/spi-omap2-mcspi.c |  256 +++++++++++++++++++++++------------------
>  1 files changed, 144 insertions(+), 112 deletions(-)
> 
> diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
> index 1c1dd34..dd8fc88 100644
> --- a/drivers/spi/spi-omap2-mcspi.c
> +++ b/drivers/spi/spi-omap2-mcspi.c
> @@ -315,49 +315,27 @@ static void omap2_mcspi_tx_callback(void *data)
>  	omap2_mcspi_set_dma_req(spi, 0, 0);
>  }
>  
> -static unsigned
> -omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
> +static void omap2_mcspi_tx_dma(struct spi_device *spi,
> +				struct spi_transfer *xfer,
> +				struct dma_slave_config cfg)
>  {
>  	struct omap2_mcspi	*mcspi;
> -	struct omap2_mcspi_cs	*cs = spi->controller_state;
>  	struct omap2_mcspi_dma  *mcspi_dma;
>  	unsigned int		count;
> -	int			word_len, element_count;
> -	int			elements = 0;
> -	u32			l;
>  	u8			* rx;
>  	const u8		* tx;
>  	void __iomem		*chstat_reg;
> -	struct dma_slave_config	cfg;
> -	enum dma_slave_buswidth width;
> -	unsigned es;
> +	struct omap2_mcspi_cs	*cs = spi->controller_state;
>  
>  	mcspi = spi_master_get_devdata(spi->master);
>  	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
> -	l = mcspi_cached_chconf0(spi);
> +	count = xfer->len;
>  
> +	rx = xfer->rx_buf;
> +	tx = xfer->tx_buf;
>  	chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0;
>  
> -	if (cs->word_len <= 8) {
> -		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
> -		es = 1;
> -	} else if (cs->word_len <= 16) {
> -		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> -		es = 2;
> -	} else {
> -		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
> -		es = 4;
> -	}
> -
> -	memset(&cfg, 0, sizeof(cfg));
> -	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
> -	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
> -	cfg.src_addr_width = width;
> -	cfg.dst_addr_width = width;
> -	cfg.src_maxburst = 1;
> -	cfg.dst_maxburst = 1;
> -
> -	if (xfer->tx_buf && mcspi_dma->dma_tx) {
> +	if (mcspi_dma->dma_tx) {
>  		struct dma_async_tx_descriptor *tx;
>  		struct scatterlist sg;
>  
> @@ -368,7 +346,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
>  		sg_dma_len(&sg) = xfer->len;
>  
>  		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_tx, &sg, 1,
> -			DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> +		DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
>  		if (tx) {
>  			tx->callback = omap2_mcspi_tx_callback;
>  			tx->callback_param = spi;
> @@ -377,8 +355,50 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
>  			/* FIXME: fall back to PIO? */
>  		}
>  	}
> +	dma_async_issue_pending(mcspi_dma->dma_tx);
> +	omap2_mcspi_set_dma_req(spi, 0, 1);
>  
> -	if (xfer->rx_buf && mcspi_dma->dma_rx) {
> +	wait_for_completion(&mcspi_dma->dma_tx_completion);
> +	dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
> +			 DMA_TO_DEVICE);
> +
> +	/* for TX_ONLY mode, be sure all words have shifted out */
> +	if (rx == NULL) {
> +		if (mcspi_wait_for_reg_bit(chstat_reg,
> +					OMAP2_MCSPI_CHSTAT_TXS) < 0)
> +			dev_err(&spi->dev, "TXS timed out\n");
> +		else if (mcspi_wait_for_reg_bit(chstat_reg,
> +					OMAP2_MCSPI_CHSTAT_EOT) < 0)
> +			dev_err(&spi->dev, "EOT timed out\n");
> +	}
> +}
> +
> +static unsigned
> +omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer,
> +				struct dma_slave_config cfg,
> +				unsigned es)
> +{
> +	struct omap2_mcspi	*mcspi;
> +	struct omap2_mcspi_dma  *mcspi_dma;
> +	unsigned int		count;
> +	u32			l;
> +	int			elements = 0;
> +	int			word_len, element_count;
> +	struct omap2_mcspi_cs	*cs = spi->controller_state;
> +	mcspi = spi_master_get_devdata(spi->master);
> +	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
> +	count = xfer->len;
> +	word_len = cs->word_len;
> +	l = mcspi_cached_chconf0(spi);
> +
> +	if (word_len <= 8)
> +		element_count = count;
> +	else if (word_len <= 16)
> +		element_count = count >> 1;
> +	else /* word_len <= 32 */
> +		element_count = count >> 2;
> +
> +	if (mcspi_dma->dma_rx) {
>  		struct dma_async_tx_descriptor *tx;
>  		struct scatterlist sg;
>  		size_t len = xfer->len - es;
> @@ -393,108 +413,120 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
>  		sg_dma_len(&sg) = len;
>  
>  		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, &sg, 1,
> -			DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> +				DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT |
> +				DMA_CTRL_ACK);
>  		if (tx) {
>  			tx->callback = omap2_mcspi_rx_callback;
>  			tx->callback_param = spi;
>  			dmaengine_submit(tx);
>  		} else {
> -			/* FIXME: fall back to PIO? */
> -		}
> -	}
> -
> -	count = xfer->len;
> -	word_len = cs->word_len;
> -
> -	rx = xfer->rx_buf;
> -	tx = xfer->tx_buf;
> -
> -	if (word_len <= 8) {
> -		element_count = count;
> -	} else if (word_len <= 16) {
> -		element_count = count >> 1;
> -	} else /* word_len <= 32 */ {
> -		element_count = count >> 2;
> -	}
> -
> -	if (tx != NULL) {
> -		dma_async_issue_pending(mcspi_dma->dma_tx);
> -		omap2_mcspi_set_dma_req(spi, 0, 1);
> -	}
> -
> -	if (rx != NULL) {
> -		dma_async_issue_pending(mcspi_dma->dma_rx);
> -		omap2_mcspi_set_dma_req(spi, 1, 1);
> -	}
> -
> -	if (tx != NULL) {
> -		wait_for_completion(&mcspi_dma->dma_tx_completion);
> -		dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
> -				 DMA_TO_DEVICE);
> -
> -		/* for TX_ONLY mode, be sure all words have shifted out */
> -		if (rx == NULL) {
> -			if (mcspi_wait_for_reg_bit(chstat_reg,
> -						OMAP2_MCSPI_CHSTAT_TXS) < 0)
> -				dev_err(&spi->dev, "TXS timed out\n");
> -			else if (mcspi_wait_for_reg_bit(chstat_reg,
> -						OMAP2_MCSPI_CHSTAT_EOT) < 0)
> -				dev_err(&spi->dev, "EOT timed out\n");
> +				/* FIXME: fall back to PIO? */
>  		}
>  	}
>  
> -	if (rx != NULL) {
> -		wait_for_completion(&mcspi_dma->dma_rx_completion);
> -		dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
> -				 DMA_FROM_DEVICE);
> -		omap2_mcspi_set_enable(spi, 0);
> +	dma_async_issue_pending(mcspi_dma->dma_rx);
> +	omap2_mcspi_set_dma_req(spi, 1, 1);
>  
> -		elements = element_count - 1;
> +	wait_for_completion(&mcspi_dma->dma_rx_completion);
> +	dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
> +			 DMA_FROM_DEVICE);
> +	omap2_mcspi_set_enable(spi, 0);
>  
> -		if (l & OMAP2_MCSPI_CHCONF_TURBO) {
> -			elements--;
> +	elements = element_count - 1;
>  
> -			if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
> -				   & OMAP2_MCSPI_CHSTAT_RXS)) {
> -				u32 w;
> -
> -				w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
> -				if (word_len <= 8)
> -					((u8 *)xfer->rx_buf)[elements++] = w;
> -				else if (word_len <= 16)
> -					((u16 *)xfer->rx_buf)[elements++] = w;
> -				else /* word_len <= 32 */
> -					((u32 *)xfer->rx_buf)[elements++] = w;
> -			} else {
> -				dev_err(&spi->dev,
> -					"DMA RX penultimate word empty");
> -				count -= (word_len <= 8)  ? 2 :
> -					(word_len <= 16) ? 4 :
> -					/* word_len <= 32 */ 8;
> -				omap2_mcspi_set_enable(spi, 1);
> -				return count;
> -			}
> -		}
> +	if (l & OMAP2_MCSPI_CHCONF_TURBO) {
> +		elements--;
>  
>  		if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
> -				& OMAP2_MCSPI_CHSTAT_RXS)) {
> +				   & OMAP2_MCSPI_CHSTAT_RXS)) {
>  			u32 w;
>  
>  			w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
>  			if (word_len <= 8)
> -				((u8 *)xfer->rx_buf)[elements] = w;
> +				((u8 *)xfer->rx_buf)[elements++] = w;
>  			else if (word_len <= 16)
> -				((u16 *)xfer->rx_buf)[elements] = w;
> +				((u16 *)xfer->rx_buf)[elements++] = w;
>  			else /* word_len <= 32 */
> -				((u32 *)xfer->rx_buf)[elements] = w;
> +				((u32 *)xfer->rx_buf)[elements++] = w;
>  		} else {
> -			dev_err(&spi->dev, "DMA RX last word empty");
> -			count -= (word_len <= 8)  ? 1 :
> -				 (word_len <= 16) ? 2 :
> -			       /* word_len <= 32 */ 4;
> +			dev_err(&spi->dev, "DMA RX penultimate word empty");
> +			count -= (word_len <= 8)  ? 2 :
> +				(word_len <= 16) ? 4 :
> +				/* word_len <= 32 */ 8;
> +			omap2_mcspi_set_enable(spi, 1);
> +			return count;
>  		}
> -		omap2_mcspi_set_enable(spi, 1);
>  	}
> +	if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
> +				& OMAP2_MCSPI_CHSTAT_RXS)) {
> +		u32 w;
> +
> +		w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
> +		if (word_len <= 8)
> +			((u8 *)xfer->rx_buf)[elements] = w;
> +		else if (word_len <= 16)
> +			((u16 *)xfer->rx_buf)[elements] = w;
> +		else /* word_len <= 32 */
> +			((u32 *)xfer->rx_buf)[elements] = w;
> +	} else {
> +		dev_err(&spi->dev, "DMA RX last word empty");
> +		count -= (word_len <= 8)  ? 1 :
> +			 (word_len <= 16) ? 2 :
> +		       /* word_len <= 32 */ 4;
> +	}
> +	omap2_mcspi_set_enable(spi, 1);
> +	return count;
> +}
> +
> +static unsigned
> +omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
> +{
> +	struct omap2_mcspi	*mcspi;
> +	struct omap2_mcspi_cs	*cs = spi->controller_state;
> +	struct omap2_mcspi_dma  *mcspi_dma;
> +	unsigned int		count;
> +	u32			l;
> +	u8			*rx;
> +	const u8		*tx;
> +	struct dma_slave_config	cfg;
> +	enum dma_slave_buswidth width;
> +	unsigned es;
> +
> +	mcspi = spi_master_get_devdata(spi->master);
> +	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
> +	l = mcspi_cached_chconf0(spi);
> +
> +
> +	if (cs->word_len <= 8) {
> +		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
> +		es = 1;
> +	} else if (cs->word_len <= 16) {
> +		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> +		es = 2;
> +	} else {
> +		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
> +		es = 4;
> +	}
> +
> +	memset(&cfg, 0, sizeof(cfg));
> +	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
> +	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
> +	cfg.src_addr_width = width;
> +	cfg.dst_addr_width = width;
> +	cfg.src_maxburst = 1;
> +	cfg.dst_maxburst = 1;
> +
> +	rx = xfer->rx_buf;
> +	tx = xfer->tx_buf;
> +
> +	count = xfer->len;
> +
> +	if (tx != NULL)
> +		omap2_mcspi_tx_dma(spi, xfer, cfg);
> +
> +	if (rx != NULL)
> +		return omap2_mcspi_rx_dma(spi, xfer, cfg, es);
> +
>  	return count;
>  }
>  
> -- 
> 1.7.5.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
  2012-09-12  3:21 ` Mark Brown
@ 2012-09-12  6:10   ` Shubhrajyoti
  0 siblings, 0 replies; 9+ messages in thread
From: Shubhrajyoti @ 2012-09-12  6:10 UTC (permalink / raw)
  To: Mark Brown; +Cc: spi-devel-general, grant.likely, linux-omap, linux-kernel

On Wednesday 12 September 2012 08:51 AM, Mark Brown wrote:
> On Tue, Sep 11, 2012 at 12:13:20PM +0530, Shubhrajyoti D wrote:
>> > Currently in omap2_mcspi_txrx_dma the tx and the rx support is
>> > interleaved. Make the rx related code in omap2_mcspi_rx_dma
>> > and the tx related code omap2_mcspi_tx_dma and call the functions.
> I'd ideally like some testing from the OMAP side before applying this -
> is there someone who can give a Tested-by?
I have tested this patch with nfs boot with ethernet being on spi on
omap4sdp and spidev.
On omap3 sdp tested the touchscreen.

However can wait for some tested-bys :-)

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
  2012-09-11  6:43 Shubhrajyoti D
@ 2012-09-12  3:21 ` Mark Brown
  2012-09-12  6:10   ` Shubhrajyoti
  2012-09-12 13:39 ` Felipe Balbi
  2012-09-12 13:52 ` Mark Brown
  2 siblings, 1 reply; 9+ messages in thread
From: Mark Brown @ 2012-09-12  3:21 UTC (permalink / raw)
  To: Shubhrajyoti D; +Cc: spi-devel-general, grant.likely, linux-omap, linux-kernel

On Tue, Sep 11, 2012 at 12:13:20PM +0530, Shubhrajyoti D wrote:
> Currently in omap2_mcspi_txrx_dma the tx and the rx support is
> interleaved. Make the rx related code in omap2_mcspi_rx_dma
> and the tx related code omap2_mcspi_tx_dma and call the functions.

I'd ideally like some testing from the OMAP side before applying this -
is there someone who can give a Tested-by?

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
@ 2012-09-11  6:43 Shubhrajyoti D
  2012-09-12  3:21 ` Mark Brown
                   ` (2 more replies)
  0 siblings, 3 replies; 9+ messages in thread
From: Shubhrajyoti D @ 2012-09-11  6:43 UTC (permalink / raw)
  To: spi-devel-general
  Cc: broonie, grant.likely, linux-omap, linux-kernel, Shubhrajyoti D

Currently in omap2_mcspi_txrx_dma the tx and the rx support is
interleaved. Make the rx related code in omap2_mcspi_rx_dma
and the tx related code omap2_mcspi_tx_dma and call the functions.

While at it remove the braces in the if statements which has only
one line.
Also fix ["foo * bar" to "foo *bar"] warn for the rx and tx variables.

Only a cleanup no functional change.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
---
 drivers/spi/spi-omap2-mcspi.c |  256 +++++++++++++++++++++++------------------
 1 files changed, 144 insertions(+), 112 deletions(-)

diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 1c1dd34..dd8fc88 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -315,49 +315,27 @@ static void omap2_mcspi_tx_callback(void *data)
 	omap2_mcspi_set_dma_req(spi, 0, 0);
 }
 
-static unsigned
-omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
+static void omap2_mcspi_tx_dma(struct spi_device *spi,
+				struct spi_transfer *xfer,
+				struct dma_slave_config cfg)
 {
 	struct omap2_mcspi	*mcspi;
-	struct omap2_mcspi_cs	*cs = spi->controller_state;
 	struct omap2_mcspi_dma  *mcspi_dma;
 	unsigned int		count;
-	int			word_len, element_count;
-	int			elements = 0;
-	u32			l;
 	u8			* rx;
 	const u8		* tx;
 	void __iomem		*chstat_reg;
-	struct dma_slave_config	cfg;
-	enum dma_slave_buswidth width;
-	unsigned es;
+	struct omap2_mcspi_cs	*cs = spi->controller_state;
 
 	mcspi = spi_master_get_devdata(spi->master);
 	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
-	l = mcspi_cached_chconf0(spi);
+	count = xfer->len;
 
+	rx = xfer->rx_buf;
+	tx = xfer->tx_buf;
 	chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0;
 
-	if (cs->word_len <= 8) {
-		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
-		es = 1;
-	} else if (cs->word_len <= 16) {
-		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
-		es = 2;
-	} else {
-		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-		es = 4;
-	}
-
-	memset(&cfg, 0, sizeof(cfg));
-	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
-	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
-	cfg.src_addr_width = width;
-	cfg.dst_addr_width = width;
-	cfg.src_maxburst = 1;
-	cfg.dst_maxburst = 1;
-
-	if (xfer->tx_buf && mcspi_dma->dma_tx) {
+	if (mcspi_dma->dma_tx) {
 		struct dma_async_tx_descriptor *tx;
 		struct scatterlist sg;
 
@@ -368,7 +346,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 		sg_dma_len(&sg) = xfer->len;
 
 		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_tx, &sg, 1,
-			DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+		DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 		if (tx) {
 			tx->callback = omap2_mcspi_tx_callback;
 			tx->callback_param = spi;
@@ -377,8 +355,50 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 			/* FIXME: fall back to PIO? */
 		}
 	}
+	dma_async_issue_pending(mcspi_dma->dma_tx);
+	omap2_mcspi_set_dma_req(spi, 0, 1);
 
-	if (xfer->rx_buf && mcspi_dma->dma_rx) {
+	wait_for_completion(&mcspi_dma->dma_tx_completion);
+	dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
+			 DMA_TO_DEVICE);
+
+	/* for TX_ONLY mode, be sure all words have shifted out */
+	if (rx == NULL) {
+		if (mcspi_wait_for_reg_bit(chstat_reg,
+					OMAP2_MCSPI_CHSTAT_TXS) < 0)
+			dev_err(&spi->dev, "TXS timed out\n");
+		else if (mcspi_wait_for_reg_bit(chstat_reg,
+					OMAP2_MCSPI_CHSTAT_EOT) < 0)
+			dev_err(&spi->dev, "EOT timed out\n");
+	}
+}
+
+static unsigned
+omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer,
+				struct dma_slave_config cfg,
+				unsigned es)
+{
+	struct omap2_mcspi	*mcspi;
+	struct omap2_mcspi_dma  *mcspi_dma;
+	unsigned int		count;
+	u32			l;
+	int			elements = 0;
+	int			word_len, element_count;
+	struct omap2_mcspi_cs	*cs = spi->controller_state;
+	mcspi = spi_master_get_devdata(spi->master);
+	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
+	count = xfer->len;
+	word_len = cs->word_len;
+	l = mcspi_cached_chconf0(spi);
+
+	if (word_len <= 8)
+		element_count = count;
+	else if (word_len <= 16)
+		element_count = count >> 1;
+	else /* word_len <= 32 */
+		element_count = count >> 2;
+
+	if (mcspi_dma->dma_rx) {
 		struct dma_async_tx_descriptor *tx;
 		struct scatterlist sg;
 		size_t len = xfer->len - es;
@@ -393,108 +413,120 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 		sg_dma_len(&sg) = len;
 
 		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, &sg, 1,
-			DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+				DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT |
+				DMA_CTRL_ACK);
 		if (tx) {
 			tx->callback = omap2_mcspi_rx_callback;
 			tx->callback_param = spi;
 			dmaengine_submit(tx);
 		} else {
-			/* FIXME: fall back to PIO? */
-		}
-	}
-
-	count = xfer->len;
-	word_len = cs->word_len;
-
-	rx = xfer->rx_buf;
-	tx = xfer->tx_buf;
-
-	if (word_len <= 8) {
-		element_count = count;
-	} else if (word_len <= 16) {
-		element_count = count >> 1;
-	} else /* word_len <= 32 */ {
-		element_count = count >> 2;
-	}
-
-	if (tx != NULL) {
-		dma_async_issue_pending(mcspi_dma->dma_tx);
-		omap2_mcspi_set_dma_req(spi, 0, 1);
-	}
-
-	if (rx != NULL) {
-		dma_async_issue_pending(mcspi_dma->dma_rx);
-		omap2_mcspi_set_dma_req(spi, 1, 1);
-	}
-
-	if (tx != NULL) {
-		wait_for_completion(&mcspi_dma->dma_tx_completion);
-		dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
-				 DMA_TO_DEVICE);
-
-		/* for TX_ONLY mode, be sure all words have shifted out */
-		if (rx == NULL) {
-			if (mcspi_wait_for_reg_bit(chstat_reg,
-						OMAP2_MCSPI_CHSTAT_TXS) < 0)
-				dev_err(&spi->dev, "TXS timed out\n");
-			else if (mcspi_wait_for_reg_bit(chstat_reg,
-						OMAP2_MCSPI_CHSTAT_EOT) < 0)
-				dev_err(&spi->dev, "EOT timed out\n");
+				/* FIXME: fall back to PIO? */
 		}
 	}
 
-	if (rx != NULL) {
-		wait_for_completion(&mcspi_dma->dma_rx_completion);
-		dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
-				 DMA_FROM_DEVICE);
-		omap2_mcspi_set_enable(spi, 0);
+	dma_async_issue_pending(mcspi_dma->dma_rx);
+	omap2_mcspi_set_dma_req(spi, 1, 1);
 
-		elements = element_count - 1;
+	wait_for_completion(&mcspi_dma->dma_rx_completion);
+	dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
+			 DMA_FROM_DEVICE);
+	omap2_mcspi_set_enable(spi, 0);
 
-		if (l & OMAP2_MCSPI_CHCONF_TURBO) {
-			elements--;
+	elements = element_count - 1;
 
-			if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
-				   & OMAP2_MCSPI_CHSTAT_RXS)) {
-				u32 w;
-
-				w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
-				if (word_len <= 8)
-					((u8 *)xfer->rx_buf)[elements++] = w;
-				else if (word_len <= 16)
-					((u16 *)xfer->rx_buf)[elements++] = w;
-				else /* word_len <= 32 */
-					((u32 *)xfer->rx_buf)[elements++] = w;
-			} else {
-				dev_err(&spi->dev,
-					"DMA RX penultimate word empty");
-				count -= (word_len <= 8)  ? 2 :
-					(word_len <= 16) ? 4 :
-					/* word_len <= 32 */ 8;
-				omap2_mcspi_set_enable(spi, 1);
-				return count;
-			}
-		}
+	if (l & OMAP2_MCSPI_CHCONF_TURBO) {
+		elements--;
 
 		if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
-				& OMAP2_MCSPI_CHSTAT_RXS)) {
+				   & OMAP2_MCSPI_CHSTAT_RXS)) {
 			u32 w;
 
 			w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
 			if (word_len <= 8)
-				((u8 *)xfer->rx_buf)[elements] = w;
+				((u8 *)xfer->rx_buf)[elements++] = w;
 			else if (word_len <= 16)
-				((u16 *)xfer->rx_buf)[elements] = w;
+				((u16 *)xfer->rx_buf)[elements++] = w;
 			else /* word_len <= 32 */
-				((u32 *)xfer->rx_buf)[elements] = w;
+				((u32 *)xfer->rx_buf)[elements++] = w;
 		} else {
-			dev_err(&spi->dev, "DMA RX last word empty");
-			count -= (word_len <= 8)  ? 1 :
-				 (word_len <= 16) ? 2 :
-			       /* word_len <= 32 */ 4;
+			dev_err(&spi->dev, "DMA RX penultimate word empty");
+			count -= (word_len <= 8)  ? 2 :
+				(word_len <= 16) ? 4 :
+				/* word_len <= 32 */ 8;
+			omap2_mcspi_set_enable(spi, 1);
+			return count;
 		}
-		omap2_mcspi_set_enable(spi, 1);
 	}
+	if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
+				& OMAP2_MCSPI_CHSTAT_RXS)) {
+		u32 w;
+
+		w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
+		if (word_len <= 8)
+			((u8 *)xfer->rx_buf)[elements] = w;
+		else if (word_len <= 16)
+			((u16 *)xfer->rx_buf)[elements] = w;
+		else /* word_len <= 32 */
+			((u32 *)xfer->rx_buf)[elements] = w;
+	} else {
+		dev_err(&spi->dev, "DMA RX last word empty");
+		count -= (word_len <= 8)  ? 1 :
+			 (word_len <= 16) ? 2 :
+		       /* word_len <= 32 */ 4;
+	}
+	omap2_mcspi_set_enable(spi, 1);
+	return count;
+}
+
+static unsigned
+omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
+{
+	struct omap2_mcspi	*mcspi;
+	struct omap2_mcspi_cs	*cs = spi->controller_state;
+	struct omap2_mcspi_dma  *mcspi_dma;
+	unsigned int		count;
+	u32			l;
+	u8			*rx;
+	const u8		*tx;
+	struct dma_slave_config	cfg;
+	enum dma_slave_buswidth width;
+	unsigned es;
+
+	mcspi = spi_master_get_devdata(spi->master);
+	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
+	l = mcspi_cached_chconf0(spi);
+
+
+	if (cs->word_len <= 8) {
+		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+		es = 1;
+	} else if (cs->word_len <= 16) {
+		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+		es = 2;
+	} else {
+		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+		es = 4;
+	}
+
+	memset(&cfg, 0, sizeof(cfg));
+	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
+	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
+	cfg.src_addr_width = width;
+	cfg.dst_addr_width = width;
+	cfg.src_maxburst = 1;
+	cfg.dst_maxburst = 1;
+
+	rx = xfer->rx_buf;
+	tx = xfer->tx_buf;
+
+	count = xfer->len;
+
+	if (tx != NULL)
+		omap2_mcspi_tx_dma(spi, xfer, cfg);
+
+	if (rx != NULL)
+		return omap2_mcspi_rx_dma(spi, xfer, cfg, es);
+
 	return count;
 }
 
-- 
1.7.5.4


^ permalink raw reply	[flat|nested] 9+ messages in thread

* [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
@ 2012-09-03 14:05 Shubhrajyoti D
  0 siblings, 0 replies; 9+ messages in thread
From: Shubhrajyoti D @ 2012-09-03 14:05 UTC (permalink / raw)
  To: spi-devel-general; +Cc: linux-omap, linux-kernel, Shubhrajyoti D

Currently in omap2_mcspi_txrx_dma the tx and the rx support is
interleaved. Make the rx related code in omap2_mcspi_rx_dma
and the tx related code omap2_mcspi_tx_dma and call the functions.

While at it remove the braces in the if statements which has only
one line.
Also fix ["foo * bar" to "foo *bar"] warn for the rx and tx variables.

Only a cleanup no functional change.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
---
 drivers/spi/spi-omap2-mcspi.c |  256 +++++++++++++++++++++++------------------
 1 files changed, 144 insertions(+), 112 deletions(-)

diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 1c1dd34..dd8fc88 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -315,49 +315,27 @@ static void omap2_mcspi_tx_callback(void *data)
 	omap2_mcspi_set_dma_req(spi, 0, 0);
 }
 
-static unsigned
-omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
+static void omap2_mcspi_tx_dma(struct spi_device *spi,
+				struct spi_transfer *xfer,
+				struct dma_slave_config cfg)
 {
 	struct omap2_mcspi	*mcspi;
-	struct omap2_mcspi_cs	*cs = spi->controller_state;
 	struct omap2_mcspi_dma  *mcspi_dma;
 	unsigned int		count;
-	int			word_len, element_count;
-	int			elements = 0;
-	u32			l;
 	u8			* rx;
 	const u8		* tx;
 	void __iomem		*chstat_reg;
-	struct dma_slave_config	cfg;
-	enum dma_slave_buswidth width;
-	unsigned es;
+	struct omap2_mcspi_cs	*cs = spi->controller_state;
 
 	mcspi = spi_master_get_devdata(spi->master);
 	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
-	l = mcspi_cached_chconf0(spi);
+	count = xfer->len;
 
+	rx = xfer->rx_buf;
+	tx = xfer->tx_buf;
 	chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0;
 
-	if (cs->word_len <= 8) {
-		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
-		es = 1;
-	} else if (cs->word_len <= 16) {
-		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
-		es = 2;
-	} else {
-		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-		es = 4;
-	}
-
-	memset(&cfg, 0, sizeof(cfg));
-	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
-	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
-	cfg.src_addr_width = width;
-	cfg.dst_addr_width = width;
-	cfg.src_maxburst = 1;
-	cfg.dst_maxburst = 1;
-
-	if (xfer->tx_buf && mcspi_dma->dma_tx) {
+	if (mcspi_dma->dma_tx) {
 		struct dma_async_tx_descriptor *tx;
 		struct scatterlist sg;
 
@@ -368,7 +346,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 		sg_dma_len(&sg) = xfer->len;
 
 		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_tx, &sg, 1,
-			DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+		DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 		if (tx) {
 			tx->callback = omap2_mcspi_tx_callback;
 			tx->callback_param = spi;
@@ -377,8 +355,50 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 			/* FIXME: fall back to PIO? */
 		}
 	}
+	dma_async_issue_pending(mcspi_dma->dma_tx);
+	omap2_mcspi_set_dma_req(spi, 0, 1);
 
-	if (xfer->rx_buf && mcspi_dma->dma_rx) {
+	wait_for_completion(&mcspi_dma->dma_tx_completion);
+	dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
+			 DMA_TO_DEVICE);
+
+	/* for TX_ONLY mode, be sure all words have shifted out */
+	if (rx == NULL) {
+		if (mcspi_wait_for_reg_bit(chstat_reg,
+					OMAP2_MCSPI_CHSTAT_TXS) < 0)
+			dev_err(&spi->dev, "TXS timed out\n");
+		else if (mcspi_wait_for_reg_bit(chstat_reg,
+					OMAP2_MCSPI_CHSTAT_EOT) < 0)
+			dev_err(&spi->dev, "EOT timed out\n");
+	}
+}
+
+static unsigned
+omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer,
+				struct dma_slave_config cfg,
+				unsigned es)
+{
+	struct omap2_mcspi	*mcspi;
+	struct omap2_mcspi_dma  *mcspi_dma;
+	unsigned int		count;
+	u32			l;
+	int			elements = 0;
+	int			word_len, element_count;
+	struct omap2_mcspi_cs	*cs = spi->controller_state;
+	mcspi = spi_master_get_devdata(spi->master);
+	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
+	count = xfer->len;
+	word_len = cs->word_len;
+	l = mcspi_cached_chconf0(spi);
+
+	if (word_len <= 8)
+		element_count = count;
+	else if (word_len <= 16)
+		element_count = count >> 1;
+	else /* word_len <= 32 */
+		element_count = count >> 2;
+
+	if (mcspi_dma->dma_rx) {
 		struct dma_async_tx_descriptor *tx;
 		struct scatterlist sg;
 		size_t len = xfer->len - es;
@@ -393,108 +413,120 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
 		sg_dma_len(&sg) = len;
 
 		tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, &sg, 1,
-			DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+				DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT |
+				DMA_CTRL_ACK);
 		if (tx) {
 			tx->callback = omap2_mcspi_rx_callback;
 			tx->callback_param = spi;
 			dmaengine_submit(tx);
 		} else {
-			/* FIXME: fall back to PIO? */
-		}
-	}
-
-	count = xfer->len;
-	word_len = cs->word_len;
-
-	rx = xfer->rx_buf;
-	tx = xfer->tx_buf;
-
-	if (word_len <= 8) {
-		element_count = count;
-	} else if (word_len <= 16) {
-		element_count = count >> 1;
-	} else /* word_len <= 32 */ {
-		element_count = count >> 2;
-	}
-
-	if (tx != NULL) {
-		dma_async_issue_pending(mcspi_dma->dma_tx);
-		omap2_mcspi_set_dma_req(spi, 0, 1);
-	}
-
-	if (rx != NULL) {
-		dma_async_issue_pending(mcspi_dma->dma_rx);
-		omap2_mcspi_set_dma_req(spi, 1, 1);
-	}
-
-	if (tx != NULL) {
-		wait_for_completion(&mcspi_dma->dma_tx_completion);
-		dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
-				 DMA_TO_DEVICE);
-
-		/* for TX_ONLY mode, be sure all words have shifted out */
-		if (rx == NULL) {
-			if (mcspi_wait_for_reg_bit(chstat_reg,
-						OMAP2_MCSPI_CHSTAT_TXS) < 0)
-				dev_err(&spi->dev, "TXS timed out\n");
-			else if (mcspi_wait_for_reg_bit(chstat_reg,
-						OMAP2_MCSPI_CHSTAT_EOT) < 0)
-				dev_err(&spi->dev, "EOT timed out\n");
+				/* FIXME: fall back to PIO? */
 		}
 	}
 
-	if (rx != NULL) {
-		wait_for_completion(&mcspi_dma->dma_rx_completion);
-		dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
-				 DMA_FROM_DEVICE);
-		omap2_mcspi_set_enable(spi, 0);
+	dma_async_issue_pending(mcspi_dma->dma_rx);
+	omap2_mcspi_set_dma_req(spi, 1, 1);
 
-		elements = element_count - 1;
+	wait_for_completion(&mcspi_dma->dma_rx_completion);
+	dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
+			 DMA_FROM_DEVICE);
+	omap2_mcspi_set_enable(spi, 0);
 
-		if (l & OMAP2_MCSPI_CHCONF_TURBO) {
-			elements--;
+	elements = element_count - 1;
 
-			if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
-				   & OMAP2_MCSPI_CHSTAT_RXS)) {
-				u32 w;
-
-				w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
-				if (word_len <= 8)
-					((u8 *)xfer->rx_buf)[elements++] = w;
-				else if (word_len <= 16)
-					((u16 *)xfer->rx_buf)[elements++] = w;
-				else /* word_len <= 32 */
-					((u32 *)xfer->rx_buf)[elements++] = w;
-			} else {
-				dev_err(&spi->dev,
-					"DMA RX penultimate word empty");
-				count -= (word_len <= 8)  ? 2 :
-					(word_len <= 16) ? 4 :
-					/* word_len <= 32 */ 8;
-				omap2_mcspi_set_enable(spi, 1);
-				return count;
-			}
-		}
+	if (l & OMAP2_MCSPI_CHCONF_TURBO) {
+		elements--;
 
 		if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
-				& OMAP2_MCSPI_CHSTAT_RXS)) {
+				   & OMAP2_MCSPI_CHSTAT_RXS)) {
 			u32 w;
 
 			w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
 			if (word_len <= 8)
-				((u8 *)xfer->rx_buf)[elements] = w;
+				((u8 *)xfer->rx_buf)[elements++] = w;
 			else if (word_len <= 16)
-				((u16 *)xfer->rx_buf)[elements] = w;
+				((u16 *)xfer->rx_buf)[elements++] = w;
 			else /* word_len <= 32 */
-				((u32 *)xfer->rx_buf)[elements] = w;
+				((u32 *)xfer->rx_buf)[elements++] = w;
 		} else {
-			dev_err(&spi->dev, "DMA RX last word empty");
-			count -= (word_len <= 8)  ? 1 :
-				 (word_len <= 16) ? 2 :
-			       /* word_len <= 32 */ 4;
+			dev_err(&spi->dev, "DMA RX penultimate word empty");
+			count -= (word_len <= 8)  ? 2 :
+				(word_len <= 16) ? 4 :
+				/* word_len <= 32 */ 8;
+			omap2_mcspi_set_enable(spi, 1);
+			return count;
 		}
-		omap2_mcspi_set_enable(spi, 1);
 	}
+	if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
+				& OMAP2_MCSPI_CHSTAT_RXS)) {
+		u32 w;
+
+		w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
+		if (word_len <= 8)
+			((u8 *)xfer->rx_buf)[elements] = w;
+		else if (word_len <= 16)
+			((u16 *)xfer->rx_buf)[elements] = w;
+		else /* word_len <= 32 */
+			((u32 *)xfer->rx_buf)[elements] = w;
+	} else {
+		dev_err(&spi->dev, "DMA RX last word empty");
+		count -= (word_len <= 8)  ? 1 :
+			 (word_len <= 16) ? 2 :
+		       /* word_len <= 32 */ 4;
+	}
+	omap2_mcspi_set_enable(spi, 1);
+	return count;
+}
+
+static unsigned
+omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
+{
+	struct omap2_mcspi	*mcspi;
+	struct omap2_mcspi_cs	*cs = spi->controller_state;
+	struct omap2_mcspi_dma  *mcspi_dma;
+	unsigned int		count;
+	u32			l;
+	u8			*rx;
+	const u8		*tx;
+	struct dma_slave_config	cfg;
+	enum dma_slave_buswidth width;
+	unsigned es;
+
+	mcspi = spi_master_get_devdata(spi->master);
+	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
+	l = mcspi_cached_chconf0(spi);
+
+
+	if (cs->word_len <= 8) {
+		width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+		es = 1;
+	} else if (cs->word_len <= 16) {
+		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+		es = 2;
+	} else {
+		width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+		es = 4;
+	}
+
+	memset(&cfg, 0, sizeof(cfg));
+	cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0;
+	cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
+	cfg.src_addr_width = width;
+	cfg.dst_addr_width = width;
+	cfg.src_maxburst = 1;
+	cfg.dst_maxburst = 1;
+
+	rx = xfer->rx_buf;
+	tx = xfer->tx_buf;
+
+	count = xfer->len;
+
+	if (tx != NULL)
+		omap2_mcspi_tx_dma(spi, xfer, cfg);
+
+	if (rx != NULL)
+		return omap2_mcspi_rx_dma(spi, xfer, cfg, es);
+
 	return count;
 }
 
-- 
1.7.5.4


^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2012-09-12 13:52 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-09-03 14:02 [PATCH] spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function Shubhrajyoti D
2012-09-03 14:05 ` Shubhrajyoti
2012-09-03 14:05 Shubhrajyoti D
2012-09-11  6:43 Shubhrajyoti D
2012-09-12  3:21 ` Mark Brown
2012-09-12  6:10   ` Shubhrajyoti
2012-09-12 13:39 ` Felipe Balbi
2012-09-12 13:48   ` Shubhrajyoti
2012-09-12 13:52 ` Mark Brown

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).