From: Matthieu CASTET <matthieu.castet@parrot.com>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<gregkh@linuxfoundation.org>, <arnd@arndb.de>,
<alan@lxorguk.ukuu.org.uk>,
Matthieu Castet <matthieu.castet@parrot.com>
Subject: Re: [PATCH v2] hvc_dcc : add support to armv4 and armv5 core
Date: Tue, 25 Sep 2012 17:40:07 +0200 [thread overview]
Message-ID: <5061D057.9000308@parrot.com> (raw)
In-Reply-To: <5040EAF7.9010003@codeaurora.org>
Stephen Boyd a écrit :
> On 8/31/2012 4:47 AM, Matthieu CASTET wrote:
>> Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com>
>
> Please consider adding some sort of commit text. Does this add some new
> feature I may want on some downstream distro kernel?
>
ok
>
> It's unfortunate that the main logic is duplicated. I wonder if we could
> push the runtime decision slightly lower into the accessor functions
> instead and make some new functions dcc_tx_busy() and dcc_rx_busy() or
> something. Then these loops stay the same.
see my previous mail
>> +static inline char __dcc_getchar(void)
>> +{
>> + char c;
>> +
>> + asm __volatile__ ("mrc p14, 0, %0, c1, c0 @ read comms data reg"
>> + : "=r" (c));
>> +
>
> Do you see any multiple character inputs? I think you may need an isb
> here similar to the v6/7 code and in the putchar as well.
I don't see multiple character.
On armv5 isb is only a memory barrier (__asm__ __volatile__ ("" : : : "memory"))
and it may be not need for dcc operation.
Matthieu
prev parent reply other threads:[~2012-09-25 15:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-31 11:47 [PATCH v2] hvc_dcc : add support to armv4 and armv5 core Matthieu CASTET
2012-08-31 16:48 ` Stephen Boyd
2012-09-03 12:57 ` Arnd Bergmann
2012-09-25 15:35 ` Matthieu CASTET
2012-09-25 15:44 ` Arnd Bergmann
2012-09-25 17:37 ` matthieu castet
2012-09-25 15:40 ` Matthieu CASTET [this message]
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