From: Waiman Long <waiman.long@hp.com>
To: George Spelvin <linux@horizon.com>
Cc: peterz@infradead.org, akpm@linux-foundation.org,
andi@firstfloor.org, arnd@arndb.de, aswin@hp.com,
daniel@numascale.com, halcy@yandex.ru, hpa@zytor.com,
linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
mingo@redhat.com, paulmck@linux.vnet.ibm.com,
raghavendra.kt@linux.vnet.ibm.com, riel@redhat.com,
rostedt@goodmis.org, scott.norton@hp.com, tglx@linutronix.de,
thavatchai.makpahibulchoke@hp.com, tim.c.chen@linux.intel.com,
torvalds@linux-foundation.org, walken@google.com, x86@kernel.org
Subject: Re: [PATCH v3 1/2] qspinlock: Introducing a 4-byte queue spinlock implementation
Date: Fri, 31 Jan 2014 14:28:45 -0500 [thread overview]
Message-ID: <52EBF96D.6010603@hp.com> (raw)
In-Reply-To: <20140131191439.29560.qmail@science.horizon.com>
On 01/31/2014 02:14 PM, George Spelvin wrote:
>> Yes, we can do something like that. However I think put_qnode() needs to
>> use atomic dec as well. As a result, we will need 2 additional atomic
>> operations per slowpath invocation. The code may look simpler, but I
>> don't think it will be faster than what I am currently doing as the
>> cases where the used flag is set will be relatively rare.
> The increment does *not* have to be atomic.
>
> First of all, note that the only reader that matters is a local interrupt;
> other processors never access the variable at all, so what they see
> is irrelevant.
>
> "Okay, so I use a non-atomic RMW instruction; what about non-x86
> processors without op-to-memory?"
>
> Well, they're okay, too. The only requriement is that the write to
> qna->cnt must be visible to the local processor (barrier()) before the
> qna->nodes[] slot is used.
>
> Remember, a local interrupt may use a slot temporarily, but will always
> return qna->cnt to its original value before returning. So there's
> nothing wrong with
>
> - Load qna->cnt to register
> - Increment register
> - Store register to qna->cnt
>
> Because an interrupt, although it may temporarily modify qna->cnt, will
> restore it before returning so this code will never see any modification.
>
> Just like using the stack below the %rsp, the only requirement is to
> ensure that the qna->cnt increment is visble *to the local processor's
> interrupt handler* before actually using the slot.
>
> The effect of the interrupt handler is that it may corrupt, at any
> time and without warning, any slot not marked in use via qna->cnt.
> But that's not a difficult thing to deal with, and does *not* require
> atomic operations.
George, you are right. I am thinking too much from the general
perspective of RMW instruction.
-Longman
next prev parent reply other threads:[~2014-01-31 19:28 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-28 18:19 [PATCH v3 0/2] qspinlock: Introducing a 4-byte queue spinlock Waiman Long
2014-01-28 18:19 ` [PATCH v3 1/2] qspinlock: Introducing a 4-byte queue spinlock implementation Waiman Long
2014-01-29 0:20 ` Andi Kleen
2014-01-29 2:57 ` George Spelvin
2014-01-29 17:57 ` Waiman Long
2014-01-30 17:43 ` Rik van Riel
2014-01-30 19:00 ` Tim Chen
2014-01-30 19:28 ` Peter Zijlstra
2014-01-30 22:27 ` Tim Chen
2014-01-31 18:26 ` Waiman Long
2014-01-31 19:14 ` George Spelvin
2014-01-31 19:28 ` Waiman Long [this message]
2014-01-31 19:45 ` Peter Zijlstra
2014-01-31 18:16 ` Waiman Long
2014-01-30 19:35 ` Peter Zijlstra
2014-01-31 18:28 ` Waiman Long
2014-01-31 15:08 ` Peter Zijlstra
2014-01-31 19:24 ` Waiman Long
2014-01-31 19:51 ` Peter Zijlstra
2014-02-03 11:40 ` Peter Zijlstra
2014-02-06 3:10 ` Waiman Long
2014-02-07 18:17 ` Paul E. McKenney
2014-02-03 8:51 ` Raghavendra K T
2014-01-28 18:19 ` [PATCH v3 2/2] qspinlock, x86: Enable x86-64 to use queue spinlock Waiman Long
2014-01-30 17:45 ` Rik van Riel
2014-01-30 8:55 ` [PATCH v3 0/2] qspinlock: Introducing a 4-byte " Raghavendra K T
2014-01-30 15:38 ` Waiman Long
2014-01-30 18:49 ` Raghavendra K T
2014-02-03 8:51 ` Raghavendra K T
2014-02-06 3:09 ` Waiman Long
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