From: Dmitry Osipenko <digetx@gmail.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>,
thierry.reding@gmail.com, jonathanh@nvidia.com,
tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com,
linus.walleij@linaro.org, stefan@agner.ch, mark.rutland@arm.com
Cc: pdeschrijver@nvidia.com, pgaikwad@nvidia.com, sboyd@kernel.org,
linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
jckuo@nvidia.com, josephl@nvidia.com, talho@nvidia.com,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
mperttunen@nvidia.com, spatra@nvidia.com, robh+dt@kernel.org,
devicetree@vger.kernel.org, rjw@rjwysocki.net,
viresh.kumar@linaro.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH v8 15/21] soc/tegra: pmc: Allow to support more tegras wake
Date: Sun, 11 Aug 2019 20:52:27 +0300 [thread overview]
Message-ID: <53634c8e-1295-86eb-60c2-27da26d05400@gmail.com> (raw)
In-Reply-To: <1565308020-31952-16-git-send-email-skomatineni@nvidia.com>
09.08.2019 2:46, Sowjanya Komatineni пишет:
> This patch allows to create separate irq_set_wake and irq_set_type
> implementations for different tegra designs PMC that has different
> wake models which require difference wake registers and different
> programming sequence.
>
> AOWAKE model support is available for Tegra186 and Tegra194 only
> and it resides within PMC and supports tiered wake architecture.
>
> Tegra210 and prior tegra designs uses PMC directly to receive wake
> events and coordinate the wake sequence.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> drivers/soc/tegra/pmc.c | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index 9f9c1c677cf4..91c84d0e66ae 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
> @@ -226,6 +226,8 @@ struct tegra_pmc_soc {
> void (*setup_irq_polarity)(struct tegra_pmc *pmc,
> struct device_node *np,
> bool invert);
> + int (*irq_set_wake)(struct irq_data *data, unsigned int on);
> + int (*irq_set_type)(struct irq_data *data, unsigned int type);
>
> const char * const *reset_sources;
> unsigned int num_reset_sources;
> @@ -1920,7 +1922,7 @@ static const struct irq_domain_ops tegra_pmc_irq_domain_ops = {
> .alloc = tegra_pmc_irq_alloc,
> };
>
> -static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on)
> +static int tegra186_pmc_irq_set_wake(struct irq_data *data, unsigned int on)
> {
> struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data);
> unsigned int offset, bit;
> @@ -1952,7 +1954,7 @@ static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on)
> return 0;
> }
>
> -static int tegra_pmc_irq_set_type(struct irq_data *data, unsigned int type)
> +static int tegra186_pmc_irq_set_type(struct irq_data *data, unsigned int type)
> {
> struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data);
> u32 value;
> @@ -2006,8 +2008,8 @@ static int tegra_pmc_irq_init(struct tegra_pmc *pmc)
> pmc->irq.irq_unmask = irq_chip_unmask_parent;
> pmc->irq.irq_eoi = irq_chip_eoi_parent;
> pmc->irq.irq_set_affinity = irq_chip_set_affinity_parent;
> - pmc->irq.irq_set_type = tegra_pmc_irq_set_type;
> - pmc->irq.irq_set_wake = tegra_pmc_irq_set_wake;
> + pmc->irq.irq_set_type = pmc->soc->irq_set_type;
> + pmc->irq.irq_set_wake = pmc->soc->irq_set_wake;
>
> pmc->domain = irq_domain_add_hierarchy(parent, 0, 96, pmc->dev->of_node,
> &tegra_pmc_irq_domain_ops, pmc);
> @@ -2680,6 +2682,8 @@ static const struct tegra_pmc_soc tegra186_pmc_soc = {
> .regs = &tegra186_pmc_regs,
> .init = NULL,
> .setup_irq_polarity = tegra186_pmc_setup_irq_polarity,
> + .irq_set_wake = tegra186_pmc_irq_set_wake,
> + .irq_set_type = tegra186_pmc_irq_set_type,
> .reset_sources = tegra186_reset_sources,
> .num_reset_sources = ARRAY_SIZE(tegra186_reset_sources),
> .reset_levels = tegra186_reset_levels,
>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
next prev parent reply other threads:[~2019-08-11 17:52 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-08 23:46 [PATCH v8 00/21] SC7 entry and exit support for Tegra210 Sowjanya Komatineni
2019-08-08 23:46 ` [PATCH v8 01/21] pinctrl: tegra: Fix write barrier placement in pmx_writel Sowjanya Komatineni
2019-08-09 11:38 ` Dmitry Osipenko
2019-08-12 9:20 ` Thierry Reding
2019-08-14 8:32 ` Linus Walleij
2019-08-08 23:46 ` [PATCH v8 02/21] pinctrl: tegra: Add write barrier after all pinctrl register writes Sowjanya Komatineni
2019-08-09 11:39 ` Dmitry Osipenko
2019-08-12 9:20 ` Thierry Reding
2019-08-14 8:33 ` Linus Walleij
2019-08-08 23:46 ` [PATCH v8 03/21] clk: tegra: divider: Save and restore divider rate Sowjanya Komatineni
2019-08-12 9:21 ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 04/21] clk: tegra: pllout: Save and restore pllout context Sowjanya Komatineni
2019-08-11 18:04 ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 05/21] clk: tegra: pll: Save and restore pll context Sowjanya Komatineni
2019-08-09 11:33 ` Dmitry Osipenko
2019-08-09 17:39 ` Sowjanya Komatineni
2019-08-09 17:50 ` Dmitry Osipenko
2019-08-09 18:50 ` Sowjanya Komatineni
2019-08-11 17:24 ` Dmitry Osipenko
2019-08-09 12:46 ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 06/21] clk: tegra: Support for OSC context save and restore Sowjanya Komatineni
2019-08-08 23:46 ` [PATCH v8 07/21] clk: Add API to get index of the clock parent Sowjanya Komatineni
2019-08-09 11:49 ` Dmitry Osipenko
2019-08-12 9:47 ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 08/21] clk: tegra: periph: Add restore_context support Sowjanya Komatineni
2019-08-09 11:55 ` Dmitry Osipenko
2019-08-09 12:20 ` Dmitry Osipenko
2019-08-09 16:55 ` Sowjanya Komatineni
2019-08-12 9:50 ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 09/21] clk: tegra: clk-super: Fix to enable PLLP branches to CPU Sowjanya Komatineni
2019-08-09 12:11 ` Dmitry Osipenko
2019-08-12 9:53 ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 10/21] clk: tegra: clk-super: Add restore-context support Sowjanya Komatineni
2019-08-09 12:17 ` Dmitry Osipenko
2019-08-09 17:08 ` Sowjanya Komatineni
2019-08-11 17:29 ` Dmitry Osipenko
2019-08-12 9:55 ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 11/21] clk: tegra: clk-dfll: Add suspend and resume support Sowjanya Komatineni
2019-08-09 12:23 ` Dmitry Osipenko
2019-08-09 16:39 ` Sowjanya Komatineni
2019-08-09 18:00 ` Dmitry Osipenko
2019-08-09 18:33 ` Sowjanya Komatineni
2019-08-09 18:52 ` Dmitry Osipenko
2019-08-12 10:01 ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 12/21] cpufreq: tegra124: " Sowjanya Komatineni
2019-08-12 10:07 ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 13/21] clk: tegra210: Use fence_udelay during PLLU init Sowjanya Komatineni
2019-08-11 18:02 ` Dmitry Osipenko
2019-08-11 19:16 ` Sowjanya Komatineni
2019-08-08 23:46 ` [PATCH v8 14/21] clk: tegra210: Add suspend and resume support Sowjanya Komatineni
2019-08-09 13:56 ` Dmitry Osipenko
2019-08-09 16:19 ` Sowjanya Komatineni
2019-08-09 18:18 ` Dmitry Osipenko
[not found] ` <cbe94f84-a17b-7e1a-811d-89db571784e1@nvidia.com>
2019-08-11 17:39 ` Dmitry Osipenko
2019-08-11 19:15 ` Sowjanya Komatineni
2019-08-12 16:25 ` Dmitry Osipenko
2019-08-12 17:28 ` Sowjanya Komatineni
2019-08-12 18:19 ` Dmitry Osipenko
2019-08-12 19:03 ` Sowjanya Komatineni
2019-08-12 20:28 ` Dmitry Osipenko
2019-08-12 10:17 ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 15/21] soc/tegra: pmc: Allow to support more tegras wake Sowjanya Komatineni
2019-08-11 17:52 ` Dmitry Osipenko [this message]
2019-08-08 23:46 ` [PATCH v8 16/21] soc/tegra: pmc: Add pmc wake support for tegra210 Sowjanya Komatineni
2019-08-09 13:28 ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 17/21] arm64: tegra: Enable wake from deep sleep on RTC alarm Sowjanya Komatineni
2019-08-08 23:46 ` [PATCH v8 18/21] soc/tegra: pmc: Configure core power request polarity Sowjanya Komatineni
2019-08-09 13:13 ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 19/21] soc/tegra: pmc: Configure deep sleep control settings Sowjanya Komatineni
2019-08-09 13:23 ` Dmitry Osipenko
2019-08-09 16:23 ` Sowjanya Komatineni
2019-08-09 17:24 ` Sowjanya Komatineni
2019-08-09 18:22 ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 20/21] arm64: dts: tegra210-p2180: Jetson TX1 SC7 timings Sowjanya Komatineni
2019-08-08 23:47 ` [PATCH v8 21/21] arm64: dts: tegra210-p3450: Jetson Nano " Sowjanya Komatineni
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53634c8e-1295-86eb-60c2-27da26d05400@gmail.com \
--to=digetx@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=jason@lakedaemon.net \
--cc=jckuo@nvidia.com \
--cc=jonathanh@nvidia.com \
--cc=josephl@nvidia.com \
--cc=linus.walleij@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=marc.zyngier@arm.com \
--cc=mark.rutland@arm.com \
--cc=mperttunen@nvidia.com \
--cc=pdeschrijver@nvidia.com \
--cc=pgaikwad@nvidia.com \
--cc=rjw@rjwysocki.net \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=skomatineni@nvidia.com \
--cc=spatra@nvidia.com \
--cc=stefan@agner.ch \
--cc=talho@nvidia.com \
--cc=tglx@linutronix.de \
--cc=thierry.reding@gmail.com \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).