From: James Hogan <james.hogan@imgtec.com>
To: Mikulas Patocka <mpatocka@redhat.com>, <linux-metag@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, Peter Zijlstra <peterz@infradead.org>
Subject: Re: [PATCH] metag: fix memory barriers
Date: Fri, 9 May 2014 14:58:33 +0100 [thread overview]
Message-ID: <536CDF09.9030200@imgtec.com> (raw)
In-Reply-To: <alpine.LRH.2.02.1405081546110.4346@file01.intranet.prod.int.rdu2.redhat.com>
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On 08/05/14 20:51, Mikulas Patocka wrote:
> Volatile access doesn't really imply the compiler barrier. Volatile access
> is only ordered with respect to other volatile accesses, it isn't ordered
> with respect to general memory accesses. Gcc may reorder memory accesses
> around volatile access, as we can see in this simple example (if we
> compile it with optimization, both increments of *b will be collapsed to
> just one):
>
> void fn(volatile int *a, long *b)
> {
> (*b)++;
> *a = 10;
> (*b)++;
> }
>
> Consequently, we need the compiler barrier after a write to the volatile
> variable, to make sure that the compiler doesn't reorder the volatile
> write with something else.
>
> Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
> Cc: stable@vger.kernel.org
Applied for v3.15, thanks!
Cheers
James
>
> ---
> arch/metag/include/asm/barrier.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> Index: linux-3.15-rc4/arch/metag/include/asm/barrier.h
> ===================================================================
> --- linux-3.15-rc4.orig/arch/metag/include/asm/barrier.h 2014-05-08 16:23:17.000000000 +0200
> +++ linux-3.15-rc4/arch/metag/include/asm/barrier.h 2014-05-08 16:24:01.000000000 +0200
> @@ -15,6 +15,7 @@ static inline void wr_fence(void)
> volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE;
> barrier();
> *flushptr = 0;
> + barrier();
> }
>
> #else /* CONFIG_METAG_META21 */
> @@ -35,6 +36,7 @@ static inline void wr_fence(void)
> *flushptr = 0;
> *flushptr = 0;
> *flushptr = 0;
> + barrier();
> }
>
> #endif /* !CONFIG_METAG_META21 */
> @@ -68,6 +70,7 @@ static inline void fence(void)
> volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK;
> barrier();
> *flushptr = 0;
> + barrier();
> }
> #define smp_mb() fence()
> #define smp_rmb() fence()
>
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prev parent reply other threads:[~2014-05-09 13:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-08 19:51 [PATCH] metag: fix memory barriers Mikulas Patocka
2014-05-09 9:11 ` Peter Zijlstra
2014-05-09 13:58 ` James Hogan [this message]
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