From: Marc Zyngier <marc.zyngier@arm.com>
To: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Cc: Anup Patel <anup@brainfault.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
Catalin Marinas <Catalin.Marinas@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Will Deacon <Will.Deacon@arm.com>,
Christoffer Dall <christoffer.dall@linaro.org>,
Eric Auger <eric.auger@linaro.org>,
Ian Campbell <ian.campbell@citrix.com>
Subject: Re: [RFC PATCH 3/9] irqchip: GIC: Convert to EOImode == 1
Date: Tue, 01 Jul 2014 09:24:41 +0100 [thread overview]
Message-ID: <53B27049.10302@arm.com> (raw)
In-Reply-To: <alpine.DEB.2.02.1406302006220.8923@kaball.uk.xensource.com>
Hi Stefano,
On 30/06/14 20:09, Stefano Stabellini wrote:
> On Wed, 25 Jun 2014, Anup Patel wrote:
>> Hi Marc,
>>
>> On Wed, Jun 25, 2014 at 2:58 PM, Marc Zyngier <marc.zyngier@arm.com> wrote:
>>> So far, GICv2 has been used in with EOImode == 0. The effect of this
>>> mode is to perform the priority drop and the deactivation of the
>>> interrupt at the same time.
>>>
>>> While this works perfectly for Linux (we only have a single priority),
>>> it causes issues when an interrupt is forwarded to a guest, and when
>>> we want the guest to perform the EOI itself.
>>>
>>> For this case, the GIC architecture provides EOImode == 1, where:
>>> - A write to the EOI register drops the priority of the interrupt and leaves
>>> it active. Other interrupts at the same priority level can now be taken,
>>> but the active interrupt cannot be taken again
>>> - A write to the DIR marks the interrupt as inactive, meaning it can
>>> now be taken again.
>>>
>>> We only enable this feature when booted in HYP mode. Also, as most device
>>> trees are broken (they report the CPU interface size to be 4kB, while
>>> the GICv2 CPU interface size is 8kB), output a warning if we're booted
>>> in HYP mode, and disable the feature.
>>>
>>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>>> ---
>>> drivers/irqchip/irq-gic.c | 61 +++++++++++++++++++++++++++++++++++++----
>>> include/linux/irqchip/arm-gic.h | 4 +++
>>> 2 files changed, 59 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
>>> index 508b815..9295bf2 100644
>>> --- a/drivers/irqchip/irq-gic.c
>>> +++ b/drivers/irqchip/irq-gic.c
>>> @@ -45,6 +45,7 @@
>>> #include <asm/irq.h>
>>> #include <asm/exception.h>
>>> #include <asm/smp_plat.h>
>>> +#include <asm/virt.h>
>>>
>>> #include "irq-gic-common.h"
>>> #include "irqchip.h"
>>> @@ -94,6 +95,10 @@ struct irq_chip gic_arch_extn = {
>>> .irq_set_wake = NULL,
>>> };
>>>
>>> +static struct irq_chip *gic_chip;
>>> +
>>> +static bool supports_deactivate = false;
>>> +
>>> #ifndef MAX_GIC_NR
>>> #define MAX_GIC_NR 1
>>> #endif
>>> @@ -185,6 +190,12 @@ static void gic_eoi_irq(struct irq_data *d)
>>> writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
>>> }
>>>
>>> +static void gic_eoi_dir_irq(struct irq_data *d)
>>> +{
>>> + gic_eoi_irq(d);
>>> + writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_DEACTIVATE);
>>> +}
>
> Would it be better if you moved the gic_eoi_irq call earlier? Maybe
> somewhere in gic_handle_irq?
I'm not sure I see what we'd gain by doing so. Can you elaborate?
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2014-07-01 8:25 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-25 9:28 [RFC PATCH 0/9] ARM: Forwarding physical interrupts to a guest VM Marc Zyngier
2014-06-25 9:28 ` [RFC PATCH 1/9] genirq: Add IRQD_IRQ_FORWARDED flag and accessors Marc Zyngier
2014-06-25 9:28 ` [RFC PATCH 2/9] genirq: Allow the state of a forwarded irq to be save/restored Marc Zyngier
2014-06-27 13:10 ` Will Deacon
2014-07-07 8:40 ` Marc Zyngier
2014-06-25 9:28 ` [RFC PATCH 3/9] irqchip: GIC: Convert to EOImode == 1 Marc Zyngier
2014-06-25 12:50 ` Rob Herring
2014-06-25 13:03 ` Marc Zyngier
2014-06-25 13:18 ` Rob Herring
2014-06-25 13:56 ` Anup Patel
2014-06-25 14:03 ` Ian Campbell
2014-06-25 14:31 ` Marc Zyngier
2014-06-25 14:08 ` Rob Herring
2014-06-25 14:24 ` Marc Zyngier
2014-06-25 14:27 ` Ian Campbell
2014-06-25 20:14 ` Joel Schopp
2014-06-30 19:09 ` Stefano Stabellini
2014-07-01 8:24 ` Marc Zyngier [this message]
2014-07-01 16:34 ` Stefano Stabellini
2014-07-01 16:42 ` Marc Zyngier
2014-06-25 14:06 ` Peter Maydell
2014-06-25 14:46 ` Marc Zyngier
2014-08-06 11:30 ` Christoffer Dall
2014-07-25 12:42 ` Eric Auger
2014-06-25 9:28 ` [RFC PATCH 4/9] irqchip: GIC: add support for forwarded interrupts Marc Zyngier
2014-06-27 13:17 ` Will Deacon
2014-07-07 10:43 ` Marc Zyngier
2014-08-06 11:30 ` Christoffer Dall
2014-06-25 9:28 ` [RFC PATCH 5/9] irqchip: GICv3: Convert to EOImode == 1 Marc Zyngier
2014-06-25 9:28 ` [RFC PATCH 6/9] irqchip: GICv3: add support for forwarded interrupts Marc Zyngier
2014-06-25 9:28 ` [RFC PATCH 7/9] KVM: arm: vgic: allow dynamic mapping of physical/virtual interrupts Marc Zyngier
2014-08-03 9:48 ` Eric Auger
2014-08-04 13:13 ` Marc Zyngier
2014-08-07 15:47 ` Eric Auger
2014-08-11 8:01 ` Christoffer Dall
2014-08-11 13:22 ` Eric Auger
2014-06-25 9:28 ` [RFC PATCH 8/9] arm: KVM: timer: move the timer switch into the non-preemptible section Marc Zyngier
2014-06-25 9:28 ` [RFC PATCH 9/9] KVM: arm: timer: make the interrupt state part of the timer state Marc Zyngier
2014-06-25 14:52 ` [RFC PATCH 0/9] ARM: Forwarding physical interrupts to a guest VM Eric Auger
2014-06-26 9:31 ` Marc Zyngier
2014-06-26 12:58 ` Eric Auger
2014-06-26 14:12 ` Marc Zyngier
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