Re: [PATCH v2 10/12] usb: dwc2/gadget: assign TX FIFO dynamically

[Robert Baldyga <r.baldyga@samsung.com>]

On 07/16/2014 09:58 PM, Paul Zimmerman wrote:
>> From: Robert Baldyga [mailto:r.baldyga@samsung.com]
>> Sent: Wednesday, July 16, 2014 3:22 AM
>>
>> Because we have not enough memory to have each TX FIFO of size at least 3072
>> bytes (the maximum single packet size), we create four FIFOs of lenght 1024,
>> and four of length 3072 bytes, and assing them to endpoints dynamically
>> according to maxpacket size value of given endpoint.
> 
> I don't think this commit message entirely explains what you are doing
> here.
> 
> 3072 is actually 3 times the max packet size for an Isoc endpoint. So you
> want to have four TX FIFOs of that size, presumably to be assigned to
> Isoc endpoints. Where before this change, all TX FIFOs were of size 768,
> which is not even 1 max packet size for an Isoc endpoint. So I guess you
> were seeing some problem with that?

FIFO size in DPTXFSIZn register is in terms of 32-bit words, so
768*4=3072 - maximum packet size with 3 transactions per microframe
(Mult=2). The problem is that we have not enough memory to have all
FIFOs of this size, so we split available memory to have at least few
FIFOs of maximum packet size.

> 
> With a TX FIFO size of 3072, an entire microframe worth of Isoc data
> (when MaxBurst=2) can fit in the FIFO. I guess that is why you chose
> 3072?
> 

Yes, this is why I chose this value.

> Also, after this change, you are only initializing 8 TX FIFOs, where
> before you were initializing all 15. So now there can only be a maximum
> of 8 IN endpoints active at the same time. That's OK I guess, but I
> think you should mention that in the commit message.
> 

We use only 8 IN endpoints so there is no need to have more TX FIFOs.

I'm preparing v3 of this patchset so I will supply better description.

Thanks,
Robert Baldyga