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From: Santosh Shilimkar <santosh.shilimkar@ti.com>
To: Linus Walleij <linus.walleij@linaro.org>,
	Grygorii Strashko <grygorii.strashko@ti.com>,
	Suman Anna <s-anna@ti.com>,
	Jaswinder Singh <jaswinder.singh@linaro.org>,
	Alexander Shiyan <shc_work@mail.ru>
Cc: Alexandre Courbot <gnurou@gmail.com>,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	<ivan.khoronzhuk@ti.com>,
	Muralidharan Karicheri <m-karicheri2@ti.com>,
	Rob Herring <robh+dt@kernel.org>,
	Kumar Gala <galak@codeaurora.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1] gpio: keystone: add dsp gpio controller driver
Date: Wed, 23 Jul 2014 11:25:56 -0400	[thread overview]
Message-ID: <53CFD404.7070704@ti.com> (raw)
In-Reply-To: <CACRpkdYY_a_9G-VLBbv2a22Cg4j0t3Wv4W1h0n6-ccCXgVJXsA@mail.gmail.com>

On Wednesday 23 July 2014 11:10 AM, Linus Walleij wrote:
> On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
> <grygorii.strashko@ti.com> wrote:
> 
>> From: Murali Karicheri <m-karicheri2@ti.com>
>>
>> On Keystone SOCs, ARM host can send interrupts to DSP cores using the
>> DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for
>> each DSP core. This is one of the component used by the IPC mechanism used
>> on Keystone SOCs.
>>
>> Keystone 2 DSP GPIO controller has specific features:
>> - each GPIO can be configured only as output pin;
>> - setting GPIO value to 1 causes IRQ generation on target DSP core;
>> - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
>>   pending.
>>
>> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
>> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
> 
> Pardon me. How is this GENERAL PURPOSE Input/Output?
> 
> It seems very very much SPECIAL PURPOSE to me, it's like
> you're just shoehorning some IPC mechanism into the GPIO
> subsystem, and this may be because the datasheet calls it
> GPIO when it's not.
>
> What other stuff than DSP is connected to these lines, and is it
> really even external lines? Aren't these just polysilicon rails
> pretty much hammered to be used by the DSP and nothing else.
>
> What is the difference between this and a mailbox IRQ line
> and the kind of stuff handled by drivers/mailbox?
>
I will try to answer this. This IP is indeed a GPIO block
but the IO's are used just OUTPUT lines from Linux
HOST perspective. These IOs are connected to the DSPs
as input/IRQ lines. The DSP-ARM host IPC mechanism used on
Keystone is Linux user-space based and it does as one of the
component.

Its not mailbox since there is no payload etc attached to it.
GPIO lib does expose the IO's to userspace and thats what is
being the case here. I think it is a legitimate usecase.

Sometimes the sending signals to another co-processor might
appear like shoehorning or odd but it just uses standard
GPIO library and its capabilities as is.

Regards,
Santosh







  reply	other threads:[~2014-07-23 15:26 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-16 10:43 [PATCH v1] gpio: keystone: add dsp gpio controller driver Grygorii Strashko
2014-07-16 10:05 ` Varka Bhadram
2014-07-21 14:20   ` Grygorii Strashko
2014-07-23 15:10 ` Linus Walleij
2014-07-23 15:25   ` Santosh Shilimkar [this message]
2014-07-24 14:12     ` Linus Walleij
2014-07-24 14:21       ` Santosh Shilimkar
2014-07-24 15:23         ` Linus Walleij
2014-07-24 15:40           ` Santosh Shilimkar
2014-07-24 17:19   ` Jassi Brar
2014-07-24 17:22     ` Santosh Shilimkar
2014-07-24 18:12       ` Jassi Brar
2014-07-24 18:52         ` Suman Anna
2014-07-24 23:41           ` Santosh Shilimkar

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