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Sun, 2 Jul 2023 19:12:08 GMT Received: from [10.216.46.140] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.7; Sun, 2 Jul 2023 12:12:02 -0700 Message-ID: <548e35a7-984d-a62f-ea4b-a5aeace8009a@quicinc.com> Date: Mon, 3 Jul 2023 00:41:59 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.1 Subject: Re: [PATCH v9 01/10] dt-bindings: usb: qcom,dwc3: Add bindings for SC8280 Multiport Content-Language: en-US To: Johan Hovold , Rob Herring CC: Thinh Nguyen , Greg Kroah-Hartman , Philipp Zabel , "Andy Gross" , Bjorn Andersson , "Konrad Dybcio" , Krzysztof Kozlowski , Felipe Balbi , "Wesley Cheng" , , , , , , , , , , References: <20230621043628.21485-1-quic_kriskura@quicinc.com> <20230621043628.21485-2-quic_kriskura@quicinc.com> From: Krishna Kurapati PSSNV In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: u4j87RUynHApAGbenT5MTQYauO3EGgN6 X-Proofpoint-ORIG-GUID: u4j87RUynHApAGbenT5MTQYauO3EGgN6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-02_15,2023-06-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 malwarescore=0 priorityscore=1501 impostorscore=0 spamscore=0 suspectscore=0 bulkscore=0 phishscore=0 mlxlogscore=441 lowpriorityscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307020182 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/27/2023 9:08 PM, Johan Hovold wrote: > On Tue, Jun 27, 2023 at 01:20:59PM +0200, Johan Hovold wrote: >> On Wed, Jun 21, 2023 at 10:06:19AM +0530, Krishna Kurapati wrote: > >>> + items: >>> + - const: dp1_hs_phy_irq >>> + - const: dm1_hs_phy_irq >>> + - const: dp2_hs_phy_irq >>> + - const: dm2_hs_phy_irq >>> + - const: dp3_hs_phy_irq >>> + - const: dm4_hs_phy_irq >>> + - const: dp4_hs_phy_irq >>> + - const: dm4_hs_phy_irq >>> + - const: ss1_phy_irq >>> + - const: ss2_phy_irq >>> + - const: pwr_event_1 >>> + - const: pwr_event_2 >>> + - const: pwr_event_3 >>> + - const: pwr_event_4 >> >> The naming here is inconsistent and interrupts should not have "_irq" >> suffixes (even if some of the current ones do for historical reasons). >> >> I believe these should be named >> >> pwr_event_1 >> dp_hs_phy_1 >> dm_hs_phy_1 >> ss_phy_1 >> >> pwr_event_2 >> dp_hs_phy_2 >> dm_hs_phy_2 >> ss_phy_2 >> >> pwr_event_3 >> dp_hs_phy_3 >> dm_hs_phy_3 >> >> pwr_event_4 >> dp_hs_phy_4 >> dm_hs_phy_4 >> >> or similar and be grouped by port while using the the >> qcom,sc8280xp-dwc ordering for the individual lines. > > Perhaps the ordering you suggested is fine too, but I'd probably move > the pwr_event ones first to match qcom,sc8280xp-dwc then, that is: > > pwr_event_1 > pwr_event_2 > pwr_event_3 > pwr_event_4 > dp_hs_phy_1 > dm_hs_phy_1 > dp_hs_phy_2 > dm_hs_phy_2 > dp_hs_phy_3 > dm_hs_phy_3 > dp_hs_phy_4 > dm_hs_phy_4 > ss_phy_1 > ss_phy_2 > > so we have them grouped as pwr_event followed by HS and with SS last. > >> Side note: Please note how the above interrupt properties can also be >> used to infer the number of HS and SS ports. > > Johan Can't we just cleanup all at once later ? Might not be a good idea for some properties in the file to have _irq and for some to not have it. I will modify the order though. Regards, Krishna,