From: Sylwester Nawrocki <s.nawrocki@samsung.com>
To: cw00.choi@samsung.com
Cc: Tomasz Figa <tomasz.figa@gmail.com>,
Mike Turquette <mturquette@linaro.org>,
Kukjin Kim <kgene@kernel.org>,
"pankaj.dubey@samsung.com" <pankaj.dubey@samsung.com>,
"inki.dae@samsung.com" <inki.dae@samsung.com>,
"chanho61.park@samsung.com" <chanho61.park@samsung.com>,
Seung-Woo Kim <sw0312.kim@samsung.com>,
linux-samsung-soc <linux-samsung-soc@vger.kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 01/12] clk: samsung: exynos5433: Add clocks using common clock framework
Date: Thu, 29 Jan 2015 13:53:17 +0100 [thread overview]
Message-ID: <54CA2D3D.3070908@samsung.com> (raw)
In-Reply-To: <CAGTfZH0nXzDgFoMF4eSW71Sey44aY9gYRzX+uWP39ut2jY_Pfg@mail.gmail.com>
Hi Chanwoo,
On 23/01/15 21:54, Chanwoo Choi wrote:
> On Sat, Jan 24, 2015 at 2:40 AM, Sylwester Nawrocki
> <s.nawrocki@samsung.com> wrote:
>> On 21/01/15 07:26, Chanwoo Choi wrote:
>>> +/* list of all parent clock list */
>>
>>> +PNAME(mout_bus_pll_user_p) = { "fin_pll", "sclk_bus_pll", };
>> ...
>>> +
>>> +static struct samsung_mux_clock top_mux_clks[] __initdata = {
>>
>>> + MUX(CLK_MOUT_BUS_PLL_USER, "mout_bus_pll_user", mout_bus_pll_user_p,
>>> + MUX_SEL_TOP1, 0, 1),
>> ...
>>> +};
>>> +
>>> +static struct samsung_div_clock top_div_clks[] __initdata = {
>> ...
>>> + /* DIV_TOP3 */
>>> + DIV(CLK_DIV_ACLK_IMEM_SSSX_266, "div_aclk_imem_sssx_266",
>>> + "mout_bus_pll_user", DIV_TOP3, 24, 3),
>>
>> Shouldn't "fin_pll" be renamed to "oscclk" ? In the documentation
>> the root clock (from XXTI input pin) seems to be referred as OSCCLK.
>> And I can't see "fin_pll" clock registered anywhere. Shouldn't there
>> be a "fixed-rate-clock" as a parent of at least CMU_TOP? e.g.
>
> Right,
> I added "fin_pll" fixed clock in DT as following:
> When I registered "fin_pll" fixed clock, I could use "fin_pll" clock
> for exynos5433 cmu without adding additional dt node.
>
> fin_pll: xxti {
> compatible = "fixed-clock";
> clock-output-names = "fin_pll";
> #clock-cells = <0>;
> };
>
> I'll add the example of "fin_pll" dt node to documentation for exynos5433 cmu.
OK, thanks. But I think it needs to be named "oscclk", FIN_PLL is almost
not existent in the SoC's documentation.
I'd suggest to define the root oscillator clock (XXTI/OSCCLK) as "oscclk"
in DT, rather than registering "fin_pll" fixed clock in the driver.
>> xxti: xxti {
>> compatible = "fixed-clock";
>> #clock-cells = <0>;
>> clock-output-names = "oscclk";
>> clock-frequency = <24000000>;
>> };
>>
>> &cmu_top {
>> clocks = <&xxti>;
>> };
--
Regards,
Sylwester
next prev parent reply other threads:[~2015-01-29 12:53 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-21 6:26 [PATCH v3 00/12] clk: samsung: Add the support for exynos5433 clocks Chanwoo Choi
2015-01-21 6:26 ` [PATCH v3 01/12] clk: samsung: exynos5433: Add clocks using common clock framework Chanwoo Choi
2015-01-22 16:47 ` Sylwester Nawrocki
2015-01-23 7:44 ` Chanwoo Choi
2015-01-23 17:40 ` Sylwester Nawrocki
2015-01-23 22:05 ` Chanwoo Choi
2015-01-28 23:38 ` Chanwoo Choi
2015-01-29 12:18 ` Sylwester Nawrocki
2015-01-24 16:11 ` Tomasz Figa
2015-01-23 17:40 ` Sylwester Nawrocki
2015-01-23 20:54 ` Chanwoo Choi
2015-01-29 12:53 ` Sylwester Nawrocki [this message]
2015-01-30 0:50 ` Chanwoo Choi
2015-01-21 6:26 ` [PATCH v3 02/12] clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain Chanwoo Choi
2015-01-21 6:26 ` [PATCH v3 03/12] clk: samsung: exynos5433: Add clocks for CMU_PERIC domain Chanwoo Choi
2015-01-21 6:26 ` [PATCH v3 04/12] clk: samsung: exynos5433: Add clocks for CMU_PERIS domain Chanwoo Choi
2015-01-21 6:26 ` [PATCH v3 05/12] clk: samsung: exynos5433: Add clocks for CMU_G2D domain Chanwoo Choi
2015-01-21 6:26 ` [PATCH v3 06/12] clk: samsung: exynos5433: Add clocks for CMU_MIF domain Chanwoo Choi
2015-01-21 6:26 ` [PATCH v3 07/12] clk: samsung: exynos5433: Add clocks for CMU_DISP domain Chanwoo Choi
2015-01-21 6:26 ` [PATCH v3 08/12] clk: samsung: exynos5433: Add clocks for CMU_AUD domain Chanwoo Choi
2015-01-21 6:26 ` [PATCH v3 09/12] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains Chanwoo Choi
2015-01-21 6:51 ` [PATCH 10/12] clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain Chanwoo Choi
2015-01-21 6:56 ` Chanwoo Choi
2015-01-21 6:51 ` [PATCH 11/12] clk: samsung: exynos5433: Add clocks for CMU_G3D domain Chanwoo Choi
2015-01-21 6:52 ` [PATCH 12/12] clk: samsung: exynos5433: Add clocks for CMU_GSCL domain Chanwoo Choi
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