From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756527AbbA2TNo (ORCPT ); Thu, 29 Jan 2015 14:13:44 -0500 Received: from smtp.codeaurora.org ([198.145.11.231]:46819 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753492AbbA2TNl (ORCPT ); Thu, 29 Jan 2015 14:13:41 -0500 Message-ID: <54CA8662.7040008@codeaurora.org> Date: Thu, 29 Jan 2015 11:13:38 -0800 From: Stephen Boyd User-Agent: Mozilla/5.0 (X11; Linux i686 on x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: Geert Uytterhoeven , Tomeu Vizoso , Mike Turquette CC: "linux-kernel@vger.kernel.org" , Javier Martinez Canillas , Jonathan Corbet , Tony Lindgren , Russell King , Ralf Baechle , Boris Brezillon , =?UTF-8?B?RW1pbGlvIEzDs3Bleg==?= , Maxime Ripard , Tero Kristo , Manuel Lauss , Alex Elder , Matt Porter , Haojian Zhuang , Zhangfei Gao , Bintian Wang , Chao Xie , "linux-doc@vger.kernel.org" , "linux-omap@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Linux MIPS Mailing List , Linux-sh list Subject: Re: [PATCH v13 4/6] clk: Add rate constraints to clocks References: <1422011024-32283-1-git-send-email-tomeu.vizoso@collabora.com> <1422011024-32283-5-git-send-email-tomeu.vizoso@collabora.com> In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/29/15 05:31, Geert Uytterhoeven wrote: > Hi Tomeu, Mike, > > On Fri, Jan 23, 2015 at 12:03 PM, Tomeu Vizoso > wrote: >> --- a/drivers/clk/clk.c >> +++ b/drivers/clk/clk.c >> @@ -2391,25 +2543,24 @@ int __clk_get(struct clk *clk) >> return 1; >> } >> >> -static void clk_core_put(struct clk_core *core) >> +void __clk_put(struct clk *clk) >> { >> struct module *owner; >> >> - owner = core->owner; >> + if (!clk || WARN_ON_ONCE(IS_ERR(clk))) >> + return; >> >> clk_prepare_lock(); >> - kref_put(&core->ref, __clk_release); >> + >> + hlist_del(&clk->child_node); >> + clk_core_set_rate_nolock(clk->core, clk->core->req_rate); > At this point, clk->core->req_rate is still zero, causing > cpg_div6_clock_round_rate() to be called with a zero "rate" parameter, > e.g. on r8a7791: Hmm.. I wonder if we should assign core->req_rate to be the same as core->rate during __clk_init()? That would make this call to clk_core_set_rate_nolock() a nop in this case. > > cpg_div6_clock_round_rate: clock sd2 rate 0 parent_rate 780000000 div 1 > cpg_div6_clock_round_rate: clock sd1 rate 0 parent_rate 780000000 div 1 > cpg_div6_clock_round_rate: clock mmc0 rate 0 parent_rate 780000000 div 1 > cpg_div6_clock_round_rate: clock sd1 rate 0 parent_rate 780000000 div 1 > cpg_div6_clock_round_rate: clock sd1 rate 0 parent_rate 780000000 div 1 > cpg_div6_clock_round_rate: clock sd2 rate 0 parent_rate 780000000 div 1 > cpg_div6_clock_round_rate: clock sd2 rate 0 parent_rate 780000000 div 1 > > and cpg_div6_clock_calc_div() is called to calculate > > div = DIV_ROUND_CLOSEST(parent_rate, rate); > > Why was this call to clk_core_set_rate_nolock() in __clk_put() added? > Before, there was no rate setting done at this point, and > cpg_div6_clock_round_rate() was not called. We need to call clk_core_set_rate_nolock() here to drop any min/max rate request that this consumer has. > > Have the semantics changed? Should .round_rate() be ready to > accept a "zero" rate, and use e.g. the current rate instead? It seems like we've also exposed a bug in cpg_div6_clock_calc_div(). Technically any driver could have called clk_round_rate() with a zero rate before this change and that would have caused the same division by zero. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project