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From: Hanjun Guo <guohanjun@huawei.com>
To: Will Deacon <will.deacon@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "hanjun.guo@linaro.org" <hanjun.guo@linaro.org>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	"Olof Johansson" <olof@lixom.net>,
	"grant.likely@linaro.org" <grant.likely@linaro.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Mark Rutland <Mark.Rutland@arm.com>,
	"graeme.gregory@linaro.org" <graeme.gregory@linaro.org>,
	Sudeep Holla <Sudeep.Holla@arm.com>,
	"jcm@redhat.com" <jcm@redhat.com>,
	Marc Zyngier <Marc.Zyngier@arm.com>,
	"Mark Brown" <broonie@kernel.org>,
	Robert Richter <rric@kernel.org>,
	Timur Tabi <timur@codeaurora.org>,
	Ashwin Chaugule <ashwinc@codeaurora.org>,
	"suravee.suthikulpanit@amd.com" <suravee.suthikulpanit@amd.com>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linaro-acpi@lists.linaro.org" <linaro-acpi@lists.linaro.org>
Subject: Re: [PATCH v10 15/21] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi
Date: Fri, 20 Mar 2015 21:07:12 +0800	[thread overview]
Message-ID: <550C1B80.1080204@huawei.com> (raw)
In-Reply-To: <20150319193724.GF4751@arm.com>

On 2015/3/20 3:37, Will Deacon wrote:
> On Thu, Mar 19, 2015 at 10:12:05AM +0000, Lorenzo Pieralisi wrote:
>> On Thu, Mar 19, 2015 at 03:45:35AM +0000, Hanjun Guo wrote:
>>>>> +	if (trigger == ACPI_EDGE_SENSITIVE &&
>>>>> +				polarity == ACPI_ACTIVE_LOW)
>>>>> +		irq_type = IRQ_TYPE_EDGE_FALLING;
>>>>> +	else if (trigger == ACPI_EDGE_SENSITIVE &&
>>>>> +				polarity == ACPI_ACTIVE_HIGH)
>>>>> +		irq_type = IRQ_TYPE_EDGE_RISING;
>>>>> +	else if (trigger == ACPI_LEVEL_SENSITIVE &&
>>>>> +				polarity == ACPI_ACTIVE_LOW)
>>>>> +		irq_type = IRQ_TYPE_LEVEL_LOW;
>>>>> +	else if (trigger == ACPI_LEVEL_SENSITIVE &&
>>>>> +				polarity == ACPI_ACTIVE_HIGH)
>>>>> +		irq_type = IRQ_TYPE_LEVEL_HIGH;
>>>>> +	else
>>>>> +		irq_type = IRQ_TYPE_NONE;
>>>>> +
>>>>> +	/*
>>>>> +	 * Since only one GIC is supported in ACPI 5.0, we can
>>>>> +	 * create mapping refer to the default domain
>>>>> +	 */
>>>>> +	irq = irq_create_mapping(NULL, gsi);
>>>>> +	if (!irq)
>>>>> +		return irq;
>>>>> +
>>>>> +	/* Set irq type if specified and different than the current one */
>>>>> +	if (irq_type != IRQ_TYPE_NONE &&
>>>>> +		irq_type != irq_get_trigger_type(irq))
>>>>> +		irq_set_irq_type(irq, irq_type);
>>>>> +	return irq;
>>>>> +}
>>>>> +EXPORT_SYMBOL_GPL(acpi_register_gsi);
>>>> I see you've still got this buried in the arch code. Is there any plan to
>>>> move it out, as I moaned about this in the last version of the series and
>>>> nothing seems to have changed?
>>> Ah, sorry. Last time when I was in Hongkong for LCA this Feb, I
>>> discussed with Lorenzo and he had a look into that too, he also met some
>>> obstacles to do that, so Lorenzo said that he will talk to you about
>>> this (Lorenzo, correct me if I'm wrong due to hearing problems of much
>>> noise in that room where we were talking).
>>>
>>> Anyway, if we move those functions to core code, such as irqdomain code,
>>> which will be compiled for x86 too, we can only set those functions as
>>> _weak, or we guard with them as #ifdef CONFIG_ARM64 ... #endif, so for
>>> me, it's really not a big deal to move those code out of arch/arm64, but
>>> I'm still open for suggestions if you can do that in a proper way.
>> You heard me clear and sound in HK, Will has a point and I looked into
>> this. Code is generic but not enough to be useful on other arches at
>> the moment, I need more time to look into this and see if we can move
>> this code to acpi core in a way that makes sense, to have, as you say,
>> a "default" implementation.
> Yeah, just something guarded by a CONFIG option (probably not ARM64
> though) would be enough, I think. Nothing too fancy.
Hi Will,

It is ARM64 related code and ACPI specific, I can come up with following code:

 arch/arm64/kernel/acpi.c | 67 ---------------------------------------------
 kernel/irq/irqdomain.c   | 70 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 70 insertions(+), 67 deletions(-)

diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index 5819ef7..d207544 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -224,73 +224,6 @@ void __init acpi_init_cpus(void)
     pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);
 }
 
-int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
-{
-    *irq = irq_find_mapping(NULL, gsi);
-
-    return 0;
-}
-EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
-
-/*
- * success: return IRQ number (>0)
- * failure: return =< 0
- */
-int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
-{
-    unsigned int irq;
-    unsigned int irq_type;
-
-    /*
-     * ACPI have no bindings to indicate SPI or PPI, so we
-     * use different mappings from DT in ACPI.
-     *
-     * For FDT
-     * PPI interrupt: in the range [0, 15];
-     * SPI interrupt: in the range [0, 987];
-     *
-     * For ACPI, GSI should be unique so using
-     * the hwirq directly for the mapping:
-     * PPI interrupt: in the range [16, 31];
-     * SPI interrupt: in the range [32, 1019];
-     */
-
-    if (trigger == ACPI_EDGE_SENSITIVE &&
-                polarity == ACPI_ACTIVE_LOW)
-        irq_type = IRQ_TYPE_EDGE_FALLING;
-    else if (trigger == ACPI_EDGE_SENSITIVE &&
-                polarity == ACPI_ACTIVE_HIGH)
-        irq_type = IRQ_TYPE_EDGE_RISING;
-    else if (trigger == ACPI_LEVEL_SENSITIVE &&
-                polarity == ACPI_ACTIVE_LOW)
-        irq_type = IRQ_TYPE_LEVEL_LOW;
-    else if (trigger == ACPI_LEVEL_SENSITIVE &&
-                polarity == ACPI_ACTIVE_HIGH)
-        irq_type = IRQ_TYPE_LEVEL_HIGH;
-    else
-        irq_type = IRQ_TYPE_NONE;
-
-    /*
-     * Since only one GIC is supported in ACPI 5.0, we can
-     * create mapping refer to the default domain
-     */
-    irq = irq_create_mapping(NULL, gsi);
-    if (!irq)
-        return irq;
-
-    /* Set irq type if specified and different than the current one */
-    if (irq_type != IRQ_TYPE_NONE &&
-        irq_type != irq_get_trigger_type(irq))
-        irq_set_irq_type(irq, irq_type);
-    return irq;
-}
-EXPORT_SYMBOL_GPL(acpi_register_gsi);
-
-void acpi_unregister_gsi(u32 gsi)
-{
-}
-EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
-
 static int __init acpi_parse_fadt(struct acpi_table_header *table)
 {
     struct acpi_table_fadt *fadt = (struct acpi_table_fadt *)table;
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index 7fac311..5a614bc 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -1,5 +1,6 @@
 #define pr_fmt(fmt)  "irq: " fmt
 
+#include <linux/acpi.h>
 #include <linux/debugfs.h>
 #include <linux/hardirq.h>
 #include <linux/interrupt.h>
@@ -568,6 +569,75 @@ unsigned int irq_find_mapping(struct irq_domain *domain,
 }
 EXPORT_SYMBOL_GPL(irq_find_mapping);
 
+#if defined(CONFIG_ARM64) && defined(CONFIG_ACPI)
+int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
+{
+    *irq = irq_find_mapping(NULL, gsi);
+
+    return 0;
+}
+EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
+
+/*
+ * success: return IRQ number (>0)
+ * failure: return =< 0
+ */
+int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
+{
+    unsigned int irq;
+    unsigned int irq_type;
+
+    /*
+     * ACPI have no bindings to indicate SPI or PPI, so we
+     * use different mappings from DT in ACPI.
+     *
+     * For FDT
+     * PPI interrupt: in the range [0, 15];
+     * SPI interrupt: in the range [0, 987];
+     *
+     * For ACPI, GSI should be unique so using
+     * the hwirq directly for the mapping:
+     * PPI interrupt: in the range [16, 31];
+     * SPI interrupt: in the range [32, 1019];
+     */
+
+    if (trigger == ACPI_EDGE_SENSITIVE &&
+                polarity == ACPI_ACTIVE_LOW)
+        irq_type = IRQ_TYPE_EDGE_FALLING;
+    else if (trigger == ACPI_EDGE_SENSITIVE &&
+                polarity == ACPI_ACTIVE_HIGH)
+        irq_type = IRQ_TYPE_EDGE_RISING;
+    else if (trigger == ACPI_LEVEL_SENSITIVE &&
+                polarity == ACPI_ACTIVE_LOW)
+        irq_type = IRQ_TYPE_LEVEL_LOW;
+    else if (trigger == ACPI_LEVEL_SENSITIVE &&
+                polarity == ACPI_ACTIVE_HIGH)
+        irq_type = IRQ_TYPE_LEVEL_HIGH;
+    else
+        irq_type = IRQ_TYPE_NONE;
+
+    /*
+     * Since only one GIC is supported in ACPI 5.1, we can
+     * create mapping refer to the default domain
+     */
+    irq = irq_create_mapping(NULL, gsi);
+    if (!irq)
+        return irq;
+
+    /* Set irq type if specified and different than the current one */
+    if (irq_type != IRQ_TYPE_NONE &&
+        irq_type != irq_get_trigger_type(irq))
+        irq_set_irq_type(irq, irq_type);
+    return irq;
+}
+EXPORT_SYMBOL_GPL(acpi_register_gsi);
+
+void acpi_unregister_gsi(u32 gsi)
+{
+}
+EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
+#endif    /* CONFIG_ARM64 && CONFIG_ACPI */
+
 #ifdef CONFIG_IRQ_DOMAIN_DEBUG
 static int virq_debug_show(struct seq_file *m, void *private)
 {

is this the way you prefered?

Thanks
Hanjun


  reply	other threads:[~2015-03-20 13:08 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-11 12:39 [PATCH v10 00/21] Introduce ACPI for ARM64 based on ACPI 5.1 Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 01/21] ACPI / table: Use pr_debug() instead of pr_info() for MADT table scanning Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 02/21] ACPI: add arm64 to the platforms that use ioremap Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 03/21] ARM64: allow late use of early_ioremap Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 04/21] ARM64 / ACPI: Get RSDP and ACPI boot-time tables Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 05/21] ACPI: fix acpi_os_ioremap for arm64 Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 06/21] ACPI / sleep: Introduce CONFIG_ACPI_GENERIC_SLEEP Hanjun Guo
2015-03-12  9:32   ` Lorenzo Pieralisi
2015-03-12 22:57   ` Rafael J. Wysocki
2015-03-13  3:31     ` Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 07/21] ARM64 / ACPI: Introduce PCI stub functions for ACPI Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 08/21] ARM64 / ACPI: Introduce early_param "acpi=" to enable/disable ACPI Hanjun Guo
2015-03-18 11:35   ` Lorenzo Pieralisi
2015-03-18 20:07     ` Ard Biesheuvel
2015-03-19  2:30       ` Hanjun Guo
2015-03-19 10:04       ` Lorenzo Pieralisi
2015-03-11 12:39 ` [PATCH v10 09/21] ARM64 / ACPI: If we chose to boot from acpi then disable FDT Hanjun Guo
2015-03-18 16:52   ` Catalin Marinas
2015-03-11 12:39 ` [PATCH v10 10/21] ARM64 / ACPI: Get PSCI flags in FADT for PSCI init Hanjun Guo
2015-03-13 14:51   ` Lorenzo Pieralisi
2015-03-16 11:45     ` Hanjun Guo
2015-03-16 18:41       ` Lorenzo Pieralisi
2015-03-11 12:39 ` [PATCH v10 11/21] ACPI / table: Print GIC information when MADT is parsed Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 12/21] ARM64 / ACPI: Parse MADT for SMP initialization Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 13/21] ACPI / processor: Introduce phys_cpuid_t for CPU hardware ID Hanjun Guo
2015-03-12  9:51   ` Lorenzo Pieralisi
2015-03-12 10:16     ` Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 14/21] ACPI / processor: Make it possible to get CPU hardware ID via GICC Hanjun Guo
2015-03-12 15:41   ` Lorenzo Pieralisi
2015-03-12 23:02   ` Rafael J. Wysocki
2015-03-11 12:39 ` [PATCH v10 15/21] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi Hanjun Guo
2015-03-18 18:41   ` Will Deacon
2015-03-19  3:45     ` Hanjun Guo
2015-03-19 10:12       ` Lorenzo Pieralisi
2015-03-19 19:37         ` Will Deacon
2015-03-20 13:07           ` Hanjun Guo [this message]
2015-03-20 14:25             ` Lorenzo Pieralisi
2015-03-21 21:38           ` Lorenzo Pieralisi
2015-03-11 12:39 ` [PATCH v10 16/21] irqchip: Add GICv2 specific ACPI boot support Hanjun Guo
     [not found]   ` <CACxGe6uWwts6X=Yc2ioBdQizXkF1_YgoNNOsREWirk2MFBVDHg@mail.gmail.com>
2015-03-11 23:11     ` Jason Cooper
2015-03-12  1:46       ` Hanjun Guo
2015-03-12  5:12         ` Jason Cooper
2015-03-12  7:31           ` Hanjun Guo
2015-03-13 17:15             ` Jason Cooper
2015-03-14  8:47               ` Grant Likely
2015-03-14 11:43                 ` Catalin Marinas
2015-03-12 10:14       ` Marc Zyngier
2015-03-14 18:44   ` Jason Cooper
2015-03-11 12:39 ` [PATCH v10 17/21] clocksource / arch_timer: Parse GTDT to initialize arch timer Hanjun Guo
2015-03-18 18:34   ` Will Deacon
2015-03-20 13:49   ` Daniel Lezcano
2015-03-11 12:39 ` [PATCH v10 18/21] ARM64 / ACPI: Select ACPI_REDUCED_HARDWARE_ONLY if ACPI is enabled on ARM64 Hanjun Guo
2015-03-12 18:21   ` Lorenzo Pieralisi
2015-03-13  3:28     ` Hanjun Guo
2015-03-13 11:04       ` Lorenzo Pieralisi
2015-03-16 11:33         ` Hanjun Guo
2015-03-17 12:50           ` Lorenzo Pieralisi
2015-03-18  9:18           ` Lorenzo Pieralisi
2015-03-18 15:06             ` Rafael J. Wysocki
2015-03-19  1:16               ` Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 19/21] ARM64 / ACPI: Enable ARM64 in Kconfig Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 20/21] Documentation: ACPI for ARM64 Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 21/21] ARM64 / ACPI: additions of ACPI documentation for arm64 Hanjun Guo
2015-03-12 13:26 ` [PATCH v10 00/21] Introduce ACPI for ARM64 based on ACPI 5.1 Timur Tabi
2015-03-16  5:07   ` Suthikulpanit, Suravee
2015-03-18 19:05 ` Will Deacon
2015-03-18 19:09   ` Will Deacon
2015-03-19  4:09   ` Hanjun Guo
2015-03-19 10:17     ` Lorenzo Pieralisi
2015-03-19 19:39       ` Will Deacon
2015-03-24 22:02         ` Grant Likely
2015-03-25 11:24           ` Will Deacon
2015-03-25 11:54             ` Rafael J. Wysocki
2015-03-25 11:38               ` Will Deacon
2015-03-25 12:16                 ` Rafael J. Wysocki
2015-03-28 12:34                 ` Grant Likely
2015-03-26 10:24           ` Lorenzo Pieralisi
2015-03-20 18:54     ` Will Deacon
2015-03-21  3:17       ` Hanjun Guo
2015-03-21  7:03         ` Hanjun Guo
     [not found]           ` <CAFoFrHatzS3MwGVeOPPjY1R1sfBRYnJjgbQjvfzi6xS+XYD14g@mail.gmail.com>
2015-03-22 21:05             ` Julien Grall
2015-03-22 21:49               ` Rafael J. Wysocki
2015-03-22 21:32                 ` Julien Grall
2015-03-22 22:11                   ` Rafael J. Wysocki
2015-03-23  1:37                     ` Hanjun Guo
2015-03-23 18:39                       ` Stefano Stabellini
2015-03-23 18:32         ` Stefano Stabellini
2015-03-24 13:46           ` Hanjun Guo
2015-03-20 13:18 ` Mark Salter

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