From: Stuart Hayes <stuart.w.hayes@gmail.com>
To: Lukas Wunner <lukas@wunner.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Austin Bolen <austin_bolen@dell.com>,
Keith Busch <kbusch@kernel.org>,
Alexandru Gagniuc <mr.nuke.me@gmail.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Andy Shevchenko <andy.shevchenko@gmail.com>,
"Gustavo A . R . Silva" <gustavo@embeddedor.com>,
Sinan Kaya <okaya@kernel.org>,
Oza Pawandeep <poza@codeaurora.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
narendra_k@dell.com, Enzo Matsumiya <ematsumiya@suse.com>
Subject: Re: [PATCH v3] PCI: pciehp: Make sure pciehp_isr clears interrupt events
Date: Thu, 13 Feb 2020 14:19:14 -0600 [thread overview]
Message-ID: <55648b65-146c-4970-3ae9-53fee03afbd2@gmail.com> (raw)
In-Reply-To: <0f772c73-5616-ae7c-6808-ecefac8ebf13@gmail.com>
On 2/10/20 3:40 PM, Stuart Hayes wrote:
>
>
> On 2/9/20 2:25 PM, Lukas Wunner wrote:
>> On Sun, Feb 09, 2020 at 07:07:22PM +0100, Lukas Wunner wrote:
>>> Actually, scratch that. After thinking about this problem for a day
>>> I've come up with a much simpler and more elegant solution. Could you
>>> test if the below works for you?
>>
>> Sorry, I missed a few things:
>>
>> * pm_runtime_put() is called too often in the MSI case.
>> * If only the CC bit is set or if ignore_hotplug is set, the function
>> may return prematurely without re-reading the Slot Status register.
>> * Returning IRQ_NONE in the MSI case even though the IRQ thread was woken
>> may incorrectly signal a spurious interrupt to the genirq code.
>> It's better to return IRQ_HANDLED instead.
>>
>> Below is another attempt. I'll have to take a look at this with a
>> fresh pair of eyeballs though to verify I haven't overlooked anything
>> else and also to determine if this is actually simpler than Stuart's
>> approach. Again, the advantage here is that processing of the events
>> by the IRQ thread is sped up by not delaying it until the Slot Status
>> register has settled.
>>
>> Thanks.
>>
>> -- >8 --
>> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
>> index c3e3f53..db5baa5 100644
>> --- a/drivers/pci/hotplug/pciehp_hpc.c
>> +++ b/drivers/pci/hotplug/pciehp_hpc.c
>> @@ -530,6 +530,7 @@ static irqreturn_t pciehp_isr(int irq, void *dev_id)
>> struct controller *ctrl = (struct controller *)dev_id;
>> struct pci_dev *pdev = ctrl_dev(ctrl);
>> struct device *parent = pdev->dev.parent;
>> + irqreturn_t ret = IRQ_NONE;
>> u16 status, events;
>>
>> /*
>> @@ -553,6 +554,7 @@ static irqreturn_t pciehp_isr(int irq, void *dev_id)
>> }
>> }
>>
>> +read_status:
>> pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &status);
>> if (status == (u16) ~0) {
>> ctrl_info(ctrl, "%s: no response from device\n", __func__);
>> @@ -579,13 +581,11 @@ static irqreturn_t pciehp_isr(int irq, void *dev_id)
>> if (!events) {
>> if (parent)
>> pm_runtime_put(parent);
>> - return IRQ_NONE;
>> + return ret;
>> }
>>
>> pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, events);
>> ctrl_dbg(ctrl, "pending interrupts %#06x from Slot Status\n", events);
>> - if (parent)
>> - pm_runtime_put(parent);
>>
>> /*
>> * Command Completed notifications are not deferred to the
>> @@ -595,21 +595,33 @@ static irqreturn_t pciehp_isr(int irq, void *dev_id)
>> ctrl->cmd_busy = 0;
>> smp_mb();
>> wake_up(&ctrl->queue);
>> -
>> - if (events == PCI_EXP_SLTSTA_CC)
>> - return IRQ_HANDLED;
>> -
>> events &= ~PCI_EXP_SLTSTA_CC;
>> }
>>
>> if (pdev->ignore_hotplug) {
>> ctrl_dbg(ctrl, "ignoring hotplug event %#06x\n", events);
>> - return IRQ_HANDLED;
>> + events = 0;
>> }
>>
>> /* Save pending events for consumption by IRQ thread. */
>> atomic_or(events, &ctrl->pending_events);
>> - return IRQ_WAKE_THREAD;
>> +
>> + /*
>> + * In MSI mode, all event bits must be zero before the port will send
>> + * a new interrupt (PCIe Base Spec r5.0 sec 6.7.3.4). So re-read the
>> + * Slot Status register in case a bit was set between read and write.
>> + */
>> + if (pci_dev_msi_enabled(pdev) && !pciehp_poll_mode) {
>> + irq_wake_thread(irq, ctrl);
>> + ret = IRQ_HANDLED;
>> + goto read_status;
>> + }
>> +
>> + if (parent)
>> + pm_runtime_put(parent);
>> + if (events)
>> + return IRQ_WAKE_THREAD;
>> + return IRQ_HANDLED;
>> }
>>
>> static irqreturn_t pciehp_ist(int irq, void *dev_id)
>>
>
> I tested this patch, and it fixes the issue on my system.
>
CCing Enzo Matsumiya.
next prev parent reply other threads:[~2020-02-13 20:19 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-07 19:54 [PATCH v3] PCI: pciehp: Make sure pciehp_isr clears interrupt events Stuart Hayes
2020-02-09 15:03 ` Lukas Wunner
2020-02-09 18:07 ` Lukas Wunner
2020-02-09 20:25 ` Lukas Wunner
2020-02-10 21:40 ` Stuart Hayes
2020-02-13 20:19 ` Stuart Hayes [this message]
2020-02-19 15:57 ` Lukas Wunner
2020-02-19 14:31 ` [PATCH v4] PCI: pciehp: Fix MSI interrupt race Lukas Wunner
2020-03-06 19:59 ` Stuart Hayes
2020-03-20 15:16 ` Joerg Roedel
2020-03-28 21:27 ` Bjorn Helgaas
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