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From: Michal Simek <monstr@monstr.eu>
To: Suneel Garapati <suneel.garapati@xilinx.com>,
	linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: tj@kernel.org, michals@xilinx.com, sorenb@xilinx.com,
	devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>
Subject: Re: [PATCH v2 1/2] devicetree:bindings: add devicetree bindings for ceva ahci
Date: Fri, 05 Jun 2015 08:46:28 +0200	[thread overview]
Message-ID: <557145C4.6030801@monstr.eu> (raw)
In-Reply-To: <1433484148-7464-2-git-send-email-suneel.garapati@xilinx.com>

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On 06/05/2015 08:02 AM, Suneel Garapati wrote:
> adds bindings for CEVA AHCI SATA controller. optional property
> broken-gen2 is useful incase of hardware speed limitation.
> 
> Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com>
> ---
>  Documentation/devicetree/bindings/ata/ahci-ceva.txt | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/ata/ahci-ceva.txt
> 
> diff --git a/Documentation/devicetree/bindings/ata/ahci-ceva.txt b/Documentation/devicetree/bindings/ata/ahci-ceva.txt
> new file mode 100644
> index 0000000..7ca8b97
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/ahci-ceva.txt
> @@ -0,0 +1,20 @@
> +Binding for CEVA AHCI SATA Controller
> +
> +Required properties:
> +  - reg: Physical base address and size of the controller's register area.
> +  - compatible: Compatibility string. Must be 'ceva,ahci-1v84'.
> +  - clocks: Input clock specifier. Refer to common clock bindings.
> +  - interrupts: Interrupt specifier. Refer to interrupt binding.
> +
> +Optional properties:
> +  - ceva,broken-gen2: limit to gen1 speed instead of gen2.
> +
> +Examples:
> +	ahci@fd0c0000 {
> +		compatible = "ceva,ahci-1v84";
> +		reg = <0xfd0c0000 0x200>;
> +		interrupt-parent = <&gic>;
> +		interrupts = <0 133 4>;
> +		clocks = <&clkc SATA_CLK_ID>;
> +		ceva,broken-gen2;
> +	};
> --
> 2.1.2

Acked-by: Michal Simek <michal.simek@xilinx.com>

FYI: Adding ceva prefix to vendor-prefixes is already in arm-soc tree.
And
ceva,broken-gen2 targets hardware limitation.

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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  reply	other threads:[~2015-06-05  6:46 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-05  6:02 [PATCH v2 0/2] Support for CEVA SATA Host controller Suneel Garapati
2015-06-05  6:02 ` [PATCH v2 1/2] devicetree:bindings: add devicetree bindings for ceva ahci Suneel Garapati
2015-06-05  6:46   ` Michal Simek [this message]
2015-06-05  6:02 ` [PATCH v2 2/2] drivers: ata: add support for Ceva sata host controller Suneel Garapati
2015-06-05  6:49   ` Michal Simek
2015-06-09  5:27   ` Tejun Heo
2015-06-09  7:12     ` Hans de Goede

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