From: Jon Hunter <jonathanh@nvidia.com>
To: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: "Paul Walmsley" <paul@pwsan.com>,
"Mike Turquette" <mturquette@linaro.org>,
"Stephen Boyd" <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
"Jonathan Corbet" <corbet@lwn.net>,
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"Daniel Walker" <dwalker@fifo99.com>,
"Bryan Huntsman" <bryanh@codeaurora.org>,
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"Sudeep Holla" <sudeep.holla@arm.com>,
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Subject: Re: [PATCH v2 1/2] clk: change clk_ops' ->round_rate() prototype
Date: Mon, 8 Jun 2015 09:46:34 +0100 [thread overview]
Message-ID: <5575566A.4060503@nvidia.com> (raw)
In-Reply-To: <20150605133928.66909901@bbrezillon>
Hi Boris,
On 05/06/15 12:39, Boris Brezillon wrote:
> Hi Jon,
>
> On Fri, 5 Jun 2015 09:46:09 +0100
> Jon Hunter <jonathanh@nvidia.com> wrote:
>
>>
>> On 05/06/15 00:02, Paul Walmsley wrote:
>>> Hi folks
>>>
>>> just a brief comment on this one:
>>>
>>> On Thu, 30 Apr 2015, Boris Brezillon wrote:
>>>
>>>> Clock rates are stored in an unsigned long field, but ->round_rate()
>>>> (which returns a rounded rate from a requested one) returns a long
>>>> value (errors are reported using negative error codes), which can lead
>>>> to long overflow if the clock rate exceed 2Ghz.
>>>>
>>>> Change ->round_rate() prototype to return 0 or an error code, and pass the
>>>> requested rate as a pointer so that it can be adjusted depending on
>>>> hardware capabilities.
>>>
>>> ...
>>>
>>>> diff --git a/Documentation/clk.txt b/Documentation/clk.txt
>>>> index 0e4f90a..fca8b7a 100644
>>>> --- a/Documentation/clk.txt
>>>> +++ b/Documentation/clk.txt
>>>> @@ -68,8 +68,8 @@ the operations defined in clk.h:
>>>> int (*is_enabled)(struct clk_hw *hw);
>>>> unsigned long (*recalc_rate)(struct clk_hw *hw,
>>>> unsigned long parent_rate);
>>>> - long (*round_rate)(struct clk_hw *hw,
>>>> - unsigned long rate,
>>>> + int (*round_rate)(struct clk_hw *hw,
>>>> + unsigned long *rate,
>>>> unsigned long *parent_rate);
>>>> long (*determine_rate)(struct clk_hw *hw,
>>>> unsigned long rate,
>>>
>>> I'd suggest that we should probably go straight to 64-bit rates. There
>>> are already plenty of clock sources that can generate rates higher than
>>> 4GiHz.
>>
>> An alternative would be to introduce to a frequency "base" the default
>> could be Hz (for backwards compatibility), but for CPUs we probably only
>> care about MHz (or may be kHz) and so 32-bits would still suffice. Even
>> if CPUs cared about Hz they could still use Hz, but in that case they
>> probably don't care about GHz. Obviously, we don't want to break DT
>> compatibility but may be the frequency base could be defined in DT and
>> if it is missing then Hz is assumed. Just a thought ...
>
> Yes, but is it really worth the additional complexity. You'll have to
> add the unit information anyway, so using an unsigned long for the
> value and another field for the unit (an enum ?) is just like using a
> 64 bit integer.
For a storage perspective, yes it would be the same. However, there are
probably a lot of devices that would not need the extra range, but would
now have to deal with 64-bit types. I have no idea how much overhead
that would be in reality. If the overhead is negligible then a 64-bit
type is definitely the way to go, as I agree it is simpler and cleaner.
Cheers
Jon
next prev parent reply other threads:[~2015-06-08 8:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-30 15:30 [PATCH v2 0/2] clk: adapt ->round_rate()/->determine_rate() prototypes Boris Brezillon
2015-04-30 15:30 ` [PATCH v2 1/2] clk: change clk_ops' ->round_rate() prototype Boris Brezillon
2015-05-07 6:39 ` Stephen Boyd
2015-05-07 7:37 ` Boris Brezillon
2015-05-15 15:40 ` Boris Brezillon
2015-05-16 11:14 ` Mikko Perttunen
2015-05-20 1:01 ` Stephen Boyd
2015-06-04 23:02 ` Paul Walmsley
2015-06-05 8:46 ` Jon Hunter
2015-06-05 11:39 ` Boris Brezillon
2015-06-08 8:46 ` Jon Hunter [this message]
2015-06-05 11:38 ` Boris Brezillon
2015-04-30 15:30 ` [PATCH v2 2/2] clk: change clk_ops' ->determine_rate() prototype Boris Brezillon
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