From: "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Cc: "rkrcmar@redhat.com" <rkrcmar@redhat.com>,
"joro@8bytes.org" <joro@8bytes.org>,
"vkuznets@redhat.com" <vkuznets@redhat.com>,
"graf@amazon.com" <graf@amazon.com>,
"jschoenh@amazon.de" <jschoenh@amazon.de>,
"karahmed@amazon.de" <karahmed@amazon.de>,
"rimasluk@amazon.com" <rimasluk@amazon.com>,
"Grimm, Jon" <Jon.Grimm@amd.com>
Subject: Re: [PATCH v3 15/16] kvm: x86: ioapic: Lazy update IOAPIC EOI
Date: Thu, 31 Oct 2019 15:17:01 +0000 [thread overview]
Message-ID: <5581f203-b9de-7f33-8afc-0d7026387a46@amd.com> (raw)
In-Reply-To: <3771e33d-365b-c214-3d40-bca67c2fa841@redhat.com>
Paolo,
On 10/9/19 4:21 AM, Paolo Bonzini wrote:
> On 13/09/19 21:01, Suthikulpanit, Suravee wrote:
>> /*
>> + * In case APICv accelerate EOI write and do not trap,
>> + * in-kernel IOAPIC will not be able to receive the EOI.
>> + * In this case, we do lazy update of the pending EOI when
>> + * trying to set IOAPIC irq.
>> + */
>> + if (kvm_apicv_eoi_accelerate(ioapic->kvm, edge))
>> + ioapic_lazy_update_eoi(ioapic, irq);
>> +
>
> This is okay for the RTC, and in fact I suggest that you make it work
> like this even for Intel. This will get rid of kvm_apicv_eoi_accelerate
> and be nicer overall.
>
> However, it cannot work for the in-kernel PIT, because it is currently
> checking ps->irq_ack before kvm_set_irq. Unfortunately, the in-kernel
> PIT is relying on the ack notifier to timely queue the pt->worker work
> item and reinject the missed tick.
>
> Thus, you cannot enable APICv if ps->reinject is true.
>
> Perhaps you can make kvm->arch.apicv_state a disabled counter? Then
> Hyper-V can increment it when enabled, PIT can increment it when
> ps->reinject becomes true and decrement it when it becomes false;
> finally, svm.c can increment it when an SVM guest is launched and
> increment/decrement it around ExtINT handling?
I have been looking into the disabled counter idea and found a couple
issues:
* I am seeing more calls to enable_irq_window() than the number of
interrupt_window_interception(). This results in imbalanced
increment/decrement of the counter.
* APICv can be deactivated due to several reasons. Currently, it is
difficult to figure out why, and this makes debugging APICv difficult.
What if we change kvm->arch.apicv_state to kvm->arch.apicv_disable_mask
and have each bit representing the reason for deactivating APICv.
For example:
#define APICV_DISABLE_MASK_IRQWIN 0
#define APICV_DISABLE_MASK_HYPERV 1
#define APICV_DISABLE_MASK_PIT_REINJ 2
#define APICV_DISABLE_MASK_NESTED 3
In this case, we activate APICv only if kvm->arch.apicv_disable_mask ==
0. This way, we can find out why APICv is deactivated on a particular VM
at a particular point in time.
Thanks,
Suravee
next prev parent reply other threads:[~2019-10-31 15:17 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-13 19:00 [PATCH v3 00/16] kvm: x86: Support AMD SVM AVIC w/ in-kernel irqchip mode Suthikulpanit, Suravee
2019-09-13 19:00 ` [PATCH v3 01/16] kvm: x86: Modify kvm_x86_ops.get_enable_apicv() to use struct kvm parameter Suthikulpanit, Suravee
2019-09-13 19:00 ` [PATCH v3 02/16] kvm: x86: Introduce KVM APICv state Suthikulpanit, Suravee
2019-09-13 19:00 ` [PATCH v3 03/16] kvm: lapic: Introduce APICv update helper function Suthikulpanit, Suravee
2019-09-13 19:00 ` [PATCH v3 04/16] kvm: x86: Add support for activate/de-activate APICv at runtime Suthikulpanit, Suravee
2019-10-09 8:38 ` Paolo Bonzini
2019-09-13 19:00 ` [PATCH v3 05/16] kvm: x86: Add APICv activate/deactivate request trace points Suthikulpanit, Suravee
2019-09-13 19:00 ` [PATCH v3 06/16] kvm: x86: svm: Add support to activate/deactivate posted interrupts Suthikulpanit, Suravee
2019-10-09 8:25 ` Paolo Bonzini
2019-09-13 19:00 ` [PATCH v3 07/16] svm: Add support for setup/destroy virutal APIC backing page for AVIC Suthikulpanit, Suravee
2019-09-13 19:00 ` [PATCH v3 08/16] svm: Add support for activate/deactivate AVIC at runtime Suthikulpanit, Suravee
2019-09-13 19:01 ` [PATCH v3 09/16] kvm: x86: hyperv: Use APICv deactivate request interface Suthikulpanit, Suravee
2019-10-09 9:21 ` Paolo Bonzini
2019-09-13 19:01 ` [PATCH v3 10/16] svm: Disable AVIC when launching guest with SVM support Suthikulpanit, Suravee
2019-09-13 19:01 ` [PATCH v3 11/16] svm: Temporary deactivate AVIC during ExtINT handling Suthikulpanit, Suravee
2019-09-13 19:01 ` [PATCH v3 12/16] kvm: x86: Introduce struct kvm_x86_ops.apicv_eoi_accelerate Suthikulpanit, Suravee
2019-09-13 19:01 ` [PATCH v3 13/16] kvm: lapic: Clean up APIC predefined macros Suthikulpanit, Suravee
2019-09-13 19:01 ` [PATCH v3 14/16] kvm: ioapic: Refactor kvm_ioapic_update_eoi() Suthikulpanit, Suravee
2019-09-13 19:01 ` [PATCH v3 15/16] kvm: x86: ioapic: Lazy update IOAPIC EOI Suthikulpanit, Suravee
2019-10-09 9:21 ` Paolo Bonzini
2019-10-09 9:55 ` Roman Kagan
2019-10-31 15:17 ` Suthikulpanit, Suravee [this message]
2019-10-31 23:09 ` Paolo Bonzini
2019-09-13 19:01 ` [PATCH v3 16/16] svm: Allow AVIC with in-kernel irqchip mode Suthikulpanit, Suravee
2019-10-08 18:44 ` [PATCH v3 00/16] kvm: x86: Support AMD SVM AVIC w/ " Suthikulpanit, Suravee
2019-10-09 9:01 ` Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5581f203-b9de-7f33-8afc-0d7026387a46@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=Jon.Grimm@amd.com \
--cc=graf@amazon.com \
--cc=joro@8bytes.org \
--cc=jschoenh@amazon.de \
--cc=karahmed@amazon.de \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=rimasluk@amazon.com \
--cc=rkrcmar@redhat.com \
--cc=vkuznets@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).