From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753361AbbJGKXK (ORCPT ); Wed, 7 Oct 2015 06:23:10 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([146.101.78.143]:10724 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752079AbbJGKXH convert rfc822-to-8bit (ORCPT ); Wed, 7 Oct 2015 06:23:07 -0400 Subject: Re: [PATCH 11/15] arm64: Cleanup VTCR_EL2 computation To: Marc Zyngier , linux-arm-kernel@lists.infradead.org References: <1442331684-28818-1-git-send-email-suzuki.poulose@arm.com> <1442331684-28818-12-git-send-email-suzuki.poulose@arm.com> <5614EFD0.20709@arm.com> Cc: linux-kernel@vger.kernel.org, Catalin.Marinas@arm.com, Will.Deacon@arm.com, Mark.Rutland@arm.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, ard.biesheuvel@linaro.org, Christoffer Dall From: "Suzuki K. Poulose" Message-ID: <5614F288.6000901@arm.com> Date: Wed, 7 Oct 2015 11:23:04 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <5614EFD0.20709@arm.com> X-OriginalArrivalTime: 07 Oct 2015 10:23:04.0379 (UTC) FILETIME=[26CD48B0:01D100EA] X-MC-Unique: JpmzBLeTQiekiW7axzrD0A-1 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/10/15 11:11, Marc Zyngier wrote: > On 15/09/15 16:41, Suzuki K. Poulose wrote: >> From: "Suzuki K. Poulose" >> >> diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h >> index bdf139e..699554d 100644 >> --- a/arch/arm64/include/asm/kvm_arm.h >> +++ b/arch/arm64/include/asm/kvm_arm.h >> @@ -138,6 +138,9 @@ >> * The magic numbers used for VTTBR_X in this patch can be found in Tables >> * D4-23 and D4-25 in ARM DDI 0487A.b. >> */ >> +#define VTCR_EL2_COMMON_BITS (VTCR_EL2_SH0_INNER | VTCR_EL2_ORGN0_WBWA | \ >> + VTCR_EL2_IRGN0_WBWA | VTCR_EL2_T0SZ_40B) >> + >> #ifdef CONFIG_ARM64_64K_PAGES >> /* >> * Stage2 translation configuration: >> @@ -145,9 +148,8 @@ >> * 64kB pages (TG0 = 1) >> * 2 level page tables (SL = 1) >> */ >> -#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SH0_INNER | \ >> - VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ >> - VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) >> +#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SL0_LVL1 | \ >> + VTCR_EL2_COMMON_BITS) >> #define VTTBR_X (38 - VTCR_EL2_T0SZ_40B) >> #else >> /* >> @@ -156,9 +158,8 @@ >> * 4kB pages (TG0 = 0) >> * 3 level page tables (SL = 1) >> */ >> -#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SH0_INNER | \ >> - VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ >> - VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) >> +#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SL0_LVL1 | \ >> + VTCR_EL2_COMMON_BITS) >> #define VTTBR_X (37 - VTCR_EL2_T0SZ_40B) >> #endif >> >> > > This looks OK, but is going to clash badly with 857d1a9 ("arm64: KVM: > set {v,}TCR_EL2 RES1 bits"). Nothing we can't fix though. > As discussed, I will rebase my series on top of 4.3-rc4 to avoid this. Thanks Suzuki