From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757011AbbJILbe (ORCPT ); Fri, 9 Oct 2015 07:31:34 -0400 Received: from lucky1.263xmail.com ([211.157.147.133]:37133 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753871AbbJILbc (ORCPT ); Fri, 9 Oct 2015 07:31:32 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: linux-arm-kernel@lists.infradead.org X-SENDER-IP: 220.200.59.254 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <8d149bc7a013506c10147d4f945afcfc> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [alsa-devel] [PATCH v5 06/10] dmaengine: add API for getting dma controller's quirk To: Lars-Peter Clausen , Vinod Koul References: <1442187923-5736-1-git-send-email-shawn.lin@rock-chips.com> <1442188139-6017-1-git-send-email-shawn.lin@rock-chips.com> <20151005153746.GG13501@vkoul-mobl.iind.intel.com> <56139289.7000005@rock-chips.com> <561629D6.9010702@metafoo.de> Cc: shawn.lin@rock-chips.com, Addy Ke , Heiko Stuebner , alsa-devel@alsa-project.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Doug Anderson , Takashi Iwai , dmaengine@vger.kernel.org, Mark Brown , Olof Johansson , Sonny Rao , linux-arm-kernel@lists.infradead.org From: Shawn Lin Message-ID: <5617A589.4090102@rock-chips.com> Date: Fri, 9 Oct 2015 19:31:21 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <561629D6.9010702@metafoo.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 在 2015/10/8 16:31, Lars-Peter Clausen 写道: > On 10/06/2015 11:21 AM, Shawn Lin wrote: >> Hi Vinod, >> >> On 2015/10/5 23:37, Vinod Koul wrote: >>> On Mon, Sep 14, 2015 at 07:48:59AM +0800, Shawn Lin wrote: >>>> Add dmaengine_get_quirks API for peripheral devices to query >>>> quirks if they need it to make special workaround due to broken >>>> dma controller design. >>>> >>>> Signed-off-by: Shawn Lin >>>> --- >>>> >>>> Changes in v5: None >>>> Changes in v4: None >>>> Changes in v3: None >>>> Changes in v2: None >>>> Changes in v1: None >>>> >>>> include/linux/dmaengine.h | 9 +++++++++ >>>> 1 file changed, 9 insertions(+) >>>> >>>> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h >>>> index e2f5eb4..5174ca4 100644 >>>> --- a/include/linux/dmaengine.h >>>> +++ b/include/linux/dmaengine.h >>>> @@ -704,6 +704,7 @@ struct dma_device { >>>> >>>> int (*device_config)(struct dma_chan *chan, >>>> struct dma_slave_config *config); >>>> + int (*device_get_quirks)(struct dma_chan *chan); >>> >>> And why do we want to expose this to users? THis doesnt seem right! >>> >> >> Basically I agree not to expose dma's quirk to slave controllers...But, the >> fact I mentioned on cover letter explain the reasons why I have to let slave >> controllers know that they are working with a broken dma. It's a dilemma >> that if we don't want that to be exposed(let slave controllers' driver get >> the info via a API), we have t add broken quirk for all of them ,here and >> there, which seems to be a disaster:( > > The problem with this API is that it transports values with device specific > meanings over a generic API. Which is generally speaking not a good idea > because the consumer witch is supposed to be generic suddenly needs to know > which provider it is talking to. > > A better solution in this case typically is either introduce a generic API > with generic values or a custom API with custom values, but don't mix the two. > >> >> I would appreciate it if you could give me some suggestions at your earliest >> convenience. :) > > In this case I think the best way to handle this is not quirks, but rather > expose the actual maximum burst size using the DMA capabilities API. Since > supporting only a certain burst depth is not really a quirk. All hardware > has a limit for this and for some it might be larger or smaller than for > others and it might be the same IP core but the maximum size depends on some > IP core parameters. So this should be discoverable. > Hi Lars, Thanks for looking for that. It's a good idea if all clients of the Soc are broken, but unfortunately some of them work. So... max burst shoule be different for individuals. > - Lars > > > > -- Best Regards Shawn Lin