From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932425AbbJIPmR (ORCPT ); Fri, 9 Oct 2015 11:42:17 -0400 Received: from mail1.bemta7.messagelabs.com ([216.82.254.103]:25621 "EHLO mail1.bemta7.messagelabs.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932365AbbJIPmP (ORCPT ); Fri, 9 Oct 2015 11:42:15 -0400 X-Env-Sender: Marc_Gonzalez@sigmadesigns.com X-Msg-Ref: server-13.tower-96.messagelabs.com!1444405332!36141869!1 X-Originating-IP: [195.215.56.170] X-StarScan-Received: X-StarScan-Version: 6.13.16; banners=-,-,- X-VirusChecked: Checked Subject: Re: [PATCH v4] clocksource/drivers/tango_xtal: Add new timer for Tango SoCs To: Mans Rullgard CC: Daniel Lezcano , Thomas Gleixner , Mason , LKML , Arnd Bergmann , Rob Herring , Mark Rutland References: <5613E45C.5020208@sigmadesigns.com> <5614549F.2070002@linaro.org> <5614D66A.1060402@sigmadesigns.com> <56150369.2050609@sigmadesigns.com> <561510BF.7050207@linaro.org> <56151B5B.90404@sigmadesigns.com> <56154268.5060700@linaro.org> <56157CB9.7010105@free.fr> <5617AF82.4000606@sigmadesigns.com> <5617C028.3040709@linaro.org> <5617D139.1000103@sigmadesigns.com> From: Marc Gonzalez Message-ID: <5617E053.8040002@sigmadesigns.com> Date: Fri, 9 Oct 2015 17:42:11 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:41.0) Gecko/20100101 Firefox/41.0 SeaMonkey/2.38 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 8bit X-Originating-IP: [172.27.0.114] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Måns Rullgård wrote: > Marc Gonzalez wrote: > >> Sigma Designs Tango platforms provide a 27 MHz crystal oscillator. >> Use it for clocksource, sched_clock, and delay_timer. > > Given the nature of this hardware, I think it would make much more sense > to support it in a generic fashion. Otherwise the next chip that comes > along with a similar counter will result in near duplicate of this > "driver", and so on. I didn't /want/ to write this driver, or rather this "driver" as you put it (implying that it is so trivial that I am lame even to submit it). It was living happily in arch/arm/clock-tango.c, but Arnd pointed out that such code must migrate to drivers/clocksource. I find your claim that this minimal device (a single register really) should be supported in a generic fashion questionable. No one seems to have ever needed this, yet it has suddenly become urgent to have it right now? I would probably have used your driver had it been mainlined; but it is not, and Rob and Mark didn't seem convinced AFAICT... (Also note that your driver doesn't set up the delay timer, which I want.) I'm sorry if my mainlining effort is not compatible with your schedule, but I've been working on this port for 6 months, and I can't wait a few more weeks just because you're not quite ready. (Have you mainstreamed the eth and intc driver? I would actually need those.) > I've suggested this before, and I even sent > patches for it (currently under discussion), Yes, and you carefully omitted to CC me, despite my request that you do so. Thanks for that. > but you keep refusing to listen. Are you that desperate to see your > name on a commit? The fact > that you keep rewriting, poorly, code you know I've already made > available suggests this might be the case. You even admit in private > that you couldn't have done this without looking at my tango3 tree. > Frankly, I find your behaviour shameful. Don't twist my words. I said I couldn't have written the eth and intc driver (and relevant DT setup). Are you now simultaneously claiming that 1) my driver is trivial 2) I couldn't have written it without your help implying that I cannot code even trivial drivers? EOT