From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752098AbbJMGaW (ORCPT ); Tue, 13 Oct 2015 02:30:22 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:43327 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751702AbbJMGaU (ORCPT ); Tue, 13 Oct 2015 02:30:20 -0400 Subject: Re: [PATCH v3 27/27] ARM: dts: omap3: Fix gpmc and NAND nodes To: Tony Lindgren References: <1442588029-13769-1-git-send-email-rogerq@ti.com> <1442588029-13769-28-git-send-email-rogerq@ti.com> <20151013004335.GU23801@atomide.com> CC: , , , , , , , , , From: Roger Quadros X-Enigmail-Draft-Status: N1110 Message-ID: <561CA4C3.4@ti.com> Date: Tue, 13 Oct 2015 09:29:23 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <20151013004335.GU23801@atomide.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/10/15 03:43, Tony Lindgren wrote: > * Roger Quadros [150918 08:00]: >> Add compatible id, GPMC register resource and interrupt >> resource to NAND controller nodes. >> >> The GPMC driver now implements gpiochip and irqchip so >> enable gpio-controller and interrupt-controller properties. >> >> With this the interrupt parent of NAND node changes so fix it >> accordingly. > ... >> --- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi >> +++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi >> @@ -35,11 +35,14 @@ >> }; >> >> &gpmc { >> - ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */ >> + ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ >> >> nand@0,0 { >> - linux,mtd-name = "micron,mt29f4g16abbda3w"; >> + compatible = "ti,omap2-nand"; >> reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ >> + interrupt-parent = <&intc>; >> + interrupts = <20>; >> + linux,mtd-name = "micron,mt29f4g16abbda3w"; >> nand-bus-width = <16>; >> ti,nand-ecc-opt = "bch8"; >> gpmc,sync-clk-ps = <0>; > > At least torpedo breaks for NFSroot as NAND now overlaps with > Ethernet.. What's the policy you have for moving the addresses > around? For OMAP3 I intended to use 0x30000000 for NAND but incorrectly used 0x08000000 for the torpedo. Does setting it to 0x30000000 work? If not what is the original NAND address for this board? > > There may be other similar cases to check too. Just checked that all other OMAP3 boards I've set to 0x30000000 if they were 0x0. cheers, -roger