From: Marc Zyngier <marc.zyngier@arm.com>
To: Jiang Liu <jiang.liu@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: Ma Jun <majun258@huawei.com>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC 0/7] Adding core support for wire-MSI bridges
Date: Fri, 16 Oct 2015 09:48:22 +0100 [thread overview]
Message-ID: <5620B9D6.1010708@arm.com> (raw)
In-Reply-To: <56205917.7090001@linux.intel.com>
Hi Gerry,
On 16/10/15 02:55, Jiang Liu wrote:
> On 2015/10/15 23:39, Marc Zyngier wrote:
>> There seems to be a new class of interrupt controller out there whose
>> sole purpose (apart from making everybody's life a nightmare) is to
>> turn wired interrupts into MSIs.
>>
>> Instead of considering that the MSIs allocated to a device are for the
>> direct use of that device, we can turn this set of MSIs into a irq
>> domain, and use that domain to build a standard irqchip on top of
>> that.
> Hi Marc,
> There's a working to enable Intel VMD storage device, which
> has the similar requirement. Basically a PCIe hierarchy is hidden
> behind a parent PCIe device, so we need to use the PCIe irqs on parent
> to de-multiple PCIe IRQs from hidden PCIe devices. Seems a chance for
> consolidation here.
Do you know if there is a 1-1 mapping between the interrupts seen by the
parent device and those seen by the hidden devices? Or is it a case of
having to demultiplex the MSIs? Looks like the former, but I'd like to
be sure.
I just had a quick look at the code there:
https://lkml.org/lkml/2015/8/27/674
Is there anything more recent?
> cc Keith Busch <keith.busch@intel.com> who is the author of
> VMD device driver.
Sure, will do when I repost this (probably in a few weeks), and assuming
this fits the bill for Thomas and the MBIGEN folks.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-10-16 8:48 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-15 15:39 [PATCH RFC 0/7] Adding core support for wire-MSI bridges Marc Zyngier
2015-10-15 15:39 ` [PATCH RFC 1/7] platform-msi: Allow MSIs to be allocated in chunks Marc Zyngier
2015-10-15 15:39 ` [PATCH RFC 2/7] platform-msi: Factor out allocation/free of private data Marc Zyngier
2015-10-16 5:46 ` Jiang Liu
2015-10-16 8:50 ` Marc Zyngier
2015-10-15 15:39 ` [PATCH RFC 3/7] irqdomain: Make irq_domain_alloc_irqs_recursive available Marc Zyngier
2015-10-15 15:39 ` [PATCH RFC 4/7] genirq/msi: Make the .prepare callback reusable Marc Zyngier
2015-10-15 17:24 ` Gabriele Paoloni
2015-10-15 17:39 ` Marc Zyngier
2015-10-16 13:07 ` Gabriele Paoloni
2015-10-16 5:45 ` Jiang Liu
2015-10-16 8:48 ` Marc Zyngier
2015-10-15 15:39 ` [PATCH RFC 5/7] genirq/msi: Add msi_domain_populate_irqs Marc Zyngier
2015-10-15 15:39 ` [PATCH RFC 6/7] platform-msi: Allow creation of a MSI-based stacked irq domain Marc Zyngier
2015-10-15 15:39 ` [PATCH RFC 7/7] irqchip: [Example] dummy wired interrupt/MSI bridge driver Marc Zyngier
2015-11-04 8:00 ` majun (F)
2015-11-04 9:03 ` Marc Zyngier
2015-11-05 8:25 ` Gabriele Paoloni
2015-11-05 9:35 ` Marc Zyngier
2015-11-05 9:43 ` Gabriele Paoloni
2015-10-15 15:46 ` [PATCH RFC 0/7] Adding core support for wire-MSI bridges Arnd Bergmann
2015-10-15 16:01 ` Marc Zyngier
2015-10-15 19:16 ` Arnd Bergmann
2015-10-16 8:03 ` Marc Zyngier
2015-10-16 8:45 ` Arnd Bergmann
2015-10-16 1:55 ` Jiang Liu
2015-10-16 8:48 ` Marc Zyngier [this message]
2015-11-04 13:34 ` Thomas Gleixner
2015-11-05 12:22 ` Marc Zyngier
2015-11-05 12:25 ` Thomas Gleixner
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