From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752265AbbJWN72 (ORCPT ); Fri, 23 Oct 2015 09:59:28 -0400 Received: from bh-25.webhostbox.net ([208.91.199.152]:45678 "EHLO bh-25.webhostbox.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752124AbbJWN7X (ORCPT ); Fri, 23 Oct 2015 09:59:23 -0400 Subject: Re: [PATCH v2 06/10] hwmon: (fam15h_power) Add ptsc counter value for accumulated power To: Huang Rui , Borislav Petkov , Peter Zijlstra , Jean Delvare , Andy Lutomirski , Andreas Herrmann , Thomas Gleixner , Ingo Molnar , "Rafael J. Wysocki" , Len Brown , John Stultz , =?UTF-8?B?RnLDqWTDqXJpYyBXZWlzYmVja2Vy?= References: <1445308109-17970-1-git-send-email-ray.huang@amd.com> <1445308109-17970-7-git-send-email-ray.huang@amd.com> Cc: lm-sensors@lm-sensors.org, linux-kernel@vger.kernel.org, x86@kernel.org, Andreas Herrmann , Aravind Gopalakrishnan , Borislav Petkov , Fengguang Wu , Aaron Lu , Tony Li From: Guenter Roeck Message-ID: <562A3D37.9080400@roeck-us.net> Date: Fri, 23 Oct 2015 06:59:19 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <1445308109-17970-7-git-send-email-ray.huang@amd.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-Authenticated_sender: linux@roeck-us.net X-OutGoing-Spam-Status: No, score=0.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - bh-25.webhostbox.net X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - roeck-us.net X-Get-Message-Sender-Via: bh-25.webhostbox.net: authenticated_id: linux@roeck-us.net X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/19/2015 07:28 PM, Huang Rui wrote: > PTSC is the performance timestamp counter value in a cpu core and the > cores in one compute unit have the fixed frequency. So it picks up the > performance timestamp counter value of the first core per compute unit > to measure the interval for average power per compute unit. > > Signed-off-by: Huang Rui > Cc: Borislav Petkov > Cc: Guenter Roeck > Cc: Peter Zijlstra > Cc: Ingo Molnar > --- > arch/x86/include/asm/msr-index.h | 1 + > drivers/hwmon/fam15h_power.c | 5 +++++ > 2 files changed, 6 insertions(+) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index c1c0a1c..3686eaa 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -313,6 +313,7 @@ > #define MSR_F15H_PERF_CTR 0xc0010201 > #define MSR_F15H_NB_PERF_CTL 0xc0010240 > #define MSR_F15H_NB_PERF_CTR 0xc0010241 > +#define MSR_F15H_PTSC 0xc0010280 > > /* Fam 10h MSRs */ > #define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058 > diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c > index 88e4f3e..6321f73 100644 > --- a/drivers/hwmon/fam15h_power.c > +++ b/drivers/hwmon/fam15h_power.c > @@ -62,6 +62,8 @@ struct fam15h_power_data { > u64 max_cu_acc_power; > /* accumulated power of the compute units */ > u64 cu_acc_power[MAX_CUS]; > + /* performance timestamp counter */ > + u64 cpu_sw_pwr_ptsc[MAX_CUS]; > }; > > static ssize_t show_power(struct device *dev, > @@ -132,6 +134,9 @@ static void do_read_registers_on_cu(void *_data) > > WARN_ON(rdmsrl_safe(MSR_F15H_CU_PWR_ACCUMULATOR, > &data->cu_acc_power[cu])); > + > + WARN_ON(rdmsrl_safe(MSR_F15H_PTSC, > + &data->cpu_sw_pwr_ptsc[cu])); > } I am not really happy with those WARN_ON, or even an error message. If the error is seen, it may be persistent. If an error check is really needed here, it might make more sense to store the read error and return it to user space if the respective sysfs attribute is read. Guenter > > static int read_registers(struct fam15h_power_data *data) >