From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752794AbbKBLEQ (ORCPT ); Mon, 2 Nov 2015 06:04:16 -0500 Received: from smtprelay4.synopsys.com ([198.182.47.9]:49354 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751571AbbKBLEN (ORCPT ); Mon, 2 Nov 2015 06:04:13 -0500 Subject: Re: [PATCH v1 02/20] clocksource: Add NPS400 timers driver To: Noam Camus , References: <1446297327-16298-1-git-send-email-noamc@ezchip.com> <1446297327-16298-3-git-send-email-noamc@ezchip.com> CC: , , , , Daniel Lezcano , "Rob Herring" , Thomas Gleixner , "John Stultz" From: Vineet Gupta Message-ID: <56374318.4030109@synopsys.com> Date: Mon, 2 Nov 2015 16:33:52 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <1446297327-16298-3-git-send-email-noamc@ezchip.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.12.197.182] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Saturday 31 October 2015 06:45 PM, Noam Camus wrote: > From: Noam Camus > > Add internal tick generator which is shared by all cores. > Each cluster of cores view it through dedicated address. > This is used for SMP system where all CPUs synced by same > clock source. > > Signed-off-by: Noam Camus > Cc: Daniel Lezcano > Cc: Rob Herring > --- [snip] > +/* > + * To get the value from the Global Timer Counter register proceed as follows: > + * 1. Read the upper 32-bit timer counter register > + * 2. Read the lower 32-bit timer counter register > + * 3. Read the upper 32-bit timer counter register again. If the value is > + * different to the 32-bit upper value read previously, go back to step 2. > + * Otherwise the 64-bit timer counter value is correct. > + */ > +static cycle_t nps_clksrc_read(struct clocksource *clksrc) > +{ > + u64 counter; > + u32 lower; > + u32 upper, old_upper; > + int cpu; > + int cluster; > + void *lower_p, *upper_p; > + unsigned long flags; > + > + local_irq_save(flags); > + cpu = smp_processor_id(); > + cluster = cpu >> NPS_CLUSTER_OFFSET; > + lower_p = (void *)nps_msu_reg_low_addr[cluster]; > + upper_p = lower_p + 4; > + local_irq_restore(flags); > + > + upper = ioread32be(upper_p); Consider using the _relaxed macros even if your platform doesn't have specific IO barriers. > + do { > + old_upper = upper; > + lower = ioread32be(lower_p); > + upper = ioread32be(upper_p); > + } while (upper != old_upper); > + > + counter = upper; > + counter <<= 32; > + counter |= lower; It is easier to read: counter = (upper << 32) | lower; > + return (cycle_t)counter; > +} > +