From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754527AbbK3U5l (ORCPT ); Mon, 30 Nov 2015 15:57:41 -0500 Received: from proxima.lp0.eu ([81.2.80.65]:33749 "EHLO proxima.lp0.eu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751587AbbK3U5j (ORCPT ); Mon, 30 Nov 2015 15:57:39 -0500 To: Philipp Zabel , Kevin Cernekee , Florian Fainelli , "devicetree@vger.kernel.org" Cc: linux-kernel@vger.kernel.org, MIPS Mailing List , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell From: Simon Arlott Subject: [PATCH 1/2] reset: Add brcm,bcm63xx-reset device tree binding Message-ID: <565CB83B.7010000@simon.arlott.org.uk> Date: Mon, 30 Nov 2015 20:57:31 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add device tree binding for the BCM63xx soft reset controller. The BCM63xx contains a soft-reset controller activated by setting a bit (that must previously have cleared). Signed-off-by: Simon Arlott --- .../bindings/reset/brcm,bcm63xx-reset.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm63xx-reset.txt diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm63xx-reset.txt b/Documentation/devicetree/bindings/reset/brcm,bcm63xx-reset.txt new file mode 100644 index 0000000..48e9daf --- /dev/null +++ b/Documentation/devicetree/bindings/reset/brcm,bcm63xx-reset.txt @@ -0,0 +1,37 @@ +BCM63xx reset controller + +The BCM63xx contains a basic soft reset controller in the perf register +set which resets components using a bit in a register. + +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +Required properties: +- compatible: Should be "brcm,bcm-reset", "brcm,bcm63xx-reset" +- regmap: The register map phandle +- offset: Offset in the register map for the reset register (in bytes) +- #reset-cells: Must be set to 1 + +Optional properties: +- mask: Mask of valid reset bits in the reset register (32 bit access) + (Defaults to all bits) + +Example: + +periph_soft_rst: reset-controller { + compatible = "brcm,bcm63168-reset", "brcm,bcm63xx-reset"; + regmap = <&periph_cntl>; + offset = <0x10>; + + #reset-cells = <1>; +}; + +usbh: usbphy@10002700 { + compatible = "brcm,bcm63168-usbh"; + reg = <0x10002700 0x38>; + clocks = <&periph_clk 13>, <&timer_clk 18>; + resets = <&periph_soft_rst 6>; + power-supply = <&power_usbh>; + #phy-cells = <0>; +}; + -- 2.1.4 -- Simon Arlott