From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
	id S1757076AbbLHQNs (ORCPT <rfc822;w@1wt.eu>);
	Tue, 8 Dec 2015 11:13:48 -0500
Received: from mailapp01.imgtec.com ([195.59.15.196]:15560 "EHLO
	mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
	with ESMTP id S1756996AbbLHQNr (ORCPT
	<rfc822;linux-kernel@vger.kernel.org>);
	Tue, 8 Dec 2015 11:13:47 -0500
Subject: Re: [PATCH v9 2/3] mtd: nand: jz4780: driver for NAND devices on
 JZ4780 SoCs
To: Boris Brezillon <boris.brezillon@free-electrons.com>
References: <1449144142-24004-1-git-send-email-harvey.hunt@imgtec.com>
 <1449144142-24004-3-git-send-email-harvey.hunt@imgtec.com>
 <20151208151436.11ce72f4@bbrezillon> <5666FF6B.5090309@imgtec.com>
 <20151208171247.7cfdbc98@bbrezillon>
CC: <linux-mtd@lists.infradead.org>,
        Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>,
        <linux-kernel@vger.kernel.org>, Alex Smith <alex.smith@imgtec.com>,
        Brian Norris <computersforpeace@gmail.com>,
        "David Woodhouse" <dwmw2@infradead.org>
From: Harvey Hunt <harvey.hunt@imgtec.com>
Message-ID: <566701B8.4050800@imgtec.com>
Date: Tue, 8 Dec 2015 16:13:44 +0000
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101
 Thunderbird/38.4.0
MIME-Version: 1.0
In-Reply-To: <20151208171247.7cfdbc98@bbrezillon>
Content-Type: text/plain; charset="windows-1252"; format=flowed
Content-Transfer-Encoding: 7bit
X-Originating-IP: [192.168.154.22]
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org



On 08/12/15 16:12, Boris Brezillon wrote:
> On Tue, 8 Dec 2015 16:03:55 +0000
> Harvey Hunt <harvey.hunt@imgtec.com> wrote:
>
>>>
>>> static void jz4780_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
>>> 				 unsigned int ctrl)
>>> {
>>> 	struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd);
>>> 	struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(nand->chip.controller);
>>> 	struct jz4780_nand_cs *cs;
>>>
>>> 	if (WARN_ON(nfc->selected < 0))
>>> 		return;
>>>
>>> 	cs = &nfc->cs[nfc->selected];
>>>
>>> 	if (ctrl & NAND_CTRL_CHANGE) {
>>> 		if (cmd != NAND_CMD_NONE) {
>>> 			if (ctrl & NAND_ALE)
>>> 				writeb(cmd, cs->base + OFFSET_ADDR);
>>> 			else if (ctrl & NAND_CLE)
>>> 				writeb(cmd, cs->base + OFFSET_CMD);
>>> 		}
>>>
>>> 		jz4780_nemc_assert(nfc->dev, cs->bank, ctrl & NAND_NCE);
>>> 	}
>>> }
>>>
>>
>> Okay, I understand your point now. I would also have to implement the
>> read/write functions to replace the defaults, correct? If so, it feels
>> strange to add functions to reimplement the default ones.
>
> I don't think you have to re-implement the {read,write}_{byte,buf,word}
> functions, because you'll still assign the ->IO_ADDR_W and ->IO_ADDR_R
> fields to cs->base + OFFSET_DATA in jz4780_nand_init_chip(), but maybe
> I'm missing something.
>

You're right, I forgot about that.