From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751551AbbLaLPB (ORCPT ); Thu, 31 Dec 2015 06:15:01 -0500 Received: from mail-wm0-f44.google.com ([74.125.82.44]:33503 "EHLO mail-wm0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750876AbbLaLO7 (ORCPT ); Thu, 31 Dec 2015 06:14:59 -0500 Subject: Re: [PATCH v3 2/5] dt-bindings: mediatek: Modify pinctrl bindings for mt2701 To: Biao Huang , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Linus Walleij References: <1451286546-5920-1-git-send-email-biao.huang@mediatek.com> <1451286546-5920-3-git-send-email-biao.huang@mediatek.com> Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, srv_heupstream@mediatek.com, yingjoe.chen@mediatek.com, hongzhou.yang@mediatek.com, erin.lo@mediatek.com From: Matthias Brugger Message-ID: <56850E2E.4060101@gmail.com> Date: Thu, 31 Dec 2015 12:14:54 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <1451286546-5920-3-git-send-email-biao.huang@mediatek.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/12/15 08:09, Biao Huang wrote: > Signed-off-by: Biao Huang > --- > .../devicetree/bindings/pinctrl/pinctrl-mt65xx.txt | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > Reviewed-by: Mathias Brugger > diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt > index 0480bc3..9ffb0b2 100644 > --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt > +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt > @@ -4,10 +4,11 @@ The Mediatek's Pin controller is used to control SoC pins. > > Required properties: > - compatible: value should be one of the following. > - (a) "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl. > - (b) "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl. > - (c) "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl. > - (d) "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl. > + "mediatek,mt2701-pinctrl", compatible with mt2701 pinctrl. > + "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl. > + "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl. > + "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl. > + "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl. > - pins-are-numbered: Specify the subnodes are using numbered pinmux to > specify pins. > - gpio-controller : Marks the device node as a gpio controller. >