From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751952AbcAEOYc (ORCPT ); Tue, 5 Jan 2016 09:24:32 -0500 Received: from mailout1.w1.samsung.com ([210.118.77.11]:51977 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751614AbcAEOYa (ORCPT ); Tue, 5 Jan 2016 09:24:30 -0500 X-AuditID: cbfec7f4-f79026d00000418a-b2-568bd21ac9f9 Subject: Re: [PATCH v2 14/38] clk: vt8500: fix sign of possible PLL values To: Stephen Boyd References: <20151001225628.GU19319@codeaurora.org> <1443761393-29366-1-git-send-email-a.hajda@samsung.com> Cc: linux-kernel@vger.kernel.org, Bartlomiej Zolnierkiewicz , Marek Szyprowski , Michael Turquette , linux-clk@vger.kernel.org From: Andrzej Hajda Message-id: <568BD20E.5060902@samsung.com> Date: Tue, 05 Jan 2016 15:24:14 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-version: 1.0 In-reply-to: <1443761393-29366-1-git-send-email-a.hajda@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHLMWRmVeSWpSXmKPExsVy+t/xa7rSl7rDDNo0LTbOWM9q8bHnHqvF 5V1z2CzWHrnLbnHxlKvFjzPdLA5sHu9vtLJ7XO7rZfLo27KK0ePzJrkAligum5TUnMyy1CJ9 uwSujCvbZ7IWnBGo2Hd7A1MD43beLkZODgkBE4m7z06yQthiEhfurWfrYuTiEBJYyijxYvk3 RgjnOaPEy9/TmUCqhAW8JLpXTGEEsUUE1CW+7zjJBmILCeRKNBzdyw7SwCxwkVFi6sNTzCAJ NgFNib+bb4IV8QpoSXRevQXWzCKgKrFp0ROgGg4OUYEIiUU7MiFKBCV+TL7HAmJzCrhIPF5x nhGkhFlAT+L+RS2QMLOAvMTmNW+ZJzAKzELSMQuhahaSqgWMzKsYRVNLkwuKk9JzDfWKE3OL S/PS9ZLzczcxQkL5yw7GxcesDjEKcDAq8fByvOwKE2JNLCuuzD3EKMHBrCTC+/pId5gQb0pi ZVVqUX58UWlOavEhRmkOFiVx3rm73ocICaQnlqRmp6YWpBbBZJk4OKUaGKsfLFp1otpgsmOs 28aD/38tuLTmTprSnk2x1dXV26UmxIfu6m+RfboheaW0xL1Q9TD9j421Nx8tf2b3JlEgxXFv 60P/D1vc+oRns3jMc15wTujf9X+B+7lz2Kp87srM5UlYclaYvznllNTLspIdR33+bS9KcLx4 3b5gxdHrS3fe4D71ksdnr6wSS3FGoqEWc1FxIgBuv+6pYQIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Ping Regards Andrzej On 10/02/2015 06:49 AM, Andrzej Hajda wrote: > With unsigned values underflow in loops can occur resulting in > theoretically infinite loops. > > The problem has been detected using proposed semantic patch > scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1]. > > [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576 > > Signed-off-by: Andrzej Hajda > --- > Hi Stephen, > > This is modified version according to your request, ie only problematic > variables have changed type. > I still think that 1st version is better, but of course it is up to you. > > Regards > Andrzej > > drivers/clk/clk-vt8500.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c > index 37e9288..98c4492 100644 > --- a/drivers/clk/clk-vt8500.c > +++ b/drivers/clk/clk-vt8500.c > @@ -384,7 +384,8 @@ static void vt8500_find_pll_bits(unsigned long rate, unsigned long parent_rate, > static void wm8650_find_pll_bits(unsigned long rate, unsigned long parent_rate, > u32 *multiplier, u32 *divisor1, u32 *divisor2) > { > - u32 mul, div1, div2; > + u32 mul, div1; > + int div2; > u32 best_mul, best_div1, best_div2; > unsigned long tclk, rate_err, best_err; > > @@ -452,7 +453,8 @@ static u32 wm8750_get_filter(u32 parent_rate, u32 divisor1) > static void wm8750_find_pll_bits(unsigned long rate, unsigned long parent_rate, > u32 *filter, u32 *multiplier, u32 *divisor1, u32 *divisor2) > { > - u32 mul, div1, div2; > + u32 mul; > + int div1, div2; > u32 best_mul, best_div1, best_div2; > unsigned long tclk, rate_err, best_err; > > @@ -496,7 +498,8 @@ static void wm8750_find_pll_bits(unsigned long rate, unsigned long parent_rate, > static void wm8850_find_pll_bits(unsigned long rate, unsigned long parent_rate, > u32 *multiplier, u32 *divisor1, u32 *divisor2) > { > - u32 mul, div1, div2; > + u32 mul; > + int div1, div2; > u32 best_mul, best_div1, best_div2; > unsigned long tclk, rate_err, best_err; >