From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753138AbcAOTmQ (ORCPT ); Fri, 15 Jan 2016 14:42:16 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:58846 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750946AbcAOTmN (ORCPT ); Fri, 15 Jan 2016 14:42:13 -0500 Subject: Re: [PATCH v3 2/3] ARM: DRA7: add pdata-quirks to do reset of PCIe To: Tony Lindgren References: <1452780672-14339-1-git-send-email-kishon@ti.com> <1452780672-14339-3-git-send-email-kishon@ti.com> <56994640.3090704@ti.com> <20160115192224.GD3904@atomide.com> CC: Kishon Vijay Abraham I , Bjorn Helgaas , , Russell King , , , , From: Suman Anna Message-ID: <56994B72.2@ti.com> Date: Fri, 15 Jan 2016 13:41:38 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <20160115192224.GD3904@atomide.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/15/2016 01:22 PM, Tony Lindgren wrote: > * Suman Anna [160115 11:20]: >> On 01/14/2016 08:11 AM, Kishon Vijay Abraham I wrote: >>> Create platform data for PCIe and populate it with function >>> pointers to perform assert and deassert of PCIe reset lines. >>> The PCIe driver can use the callbacks provided here to >>> reset the PCIe. >>> This will be removed once the reset contoller driver is >>> available to reset PCIe. > ... > >>> +/** >>> + * struct pci_dra7xx_platform_data - platform data specific to pci in dra7xx >>> + * @reset_name: name of the reset line >>> + * @assert_reset: callback for performing assert reset operation >>> + * @deassert_reset: callback for performing deassert reset operation >>> + */ >>> +struct pci_dra7xx_platform_data { >>> + const char *reset_name; >>> + >>> + int (*assert_reset)(struct platform_device *pdev, const char *name); >>> + int (*deassert_reset)(struct platform_device *pdev, const char *name); >>> +}; > > I doubt this platform_data is dra7 specific. I believe it's > the same PCI controller that has been in the omap variants for > years? AFAIK, this only applies to DRA7. Sekhar/Kishon can confirm. I did take a quick look at OMAP3/4/5 TRMs, and didn't find any. Neither did a grep on current hwmod files other than DRA7. There's a DM81xx related PCI clock domain, but don't see any corresponding driver/device for the same. regards Suman