From: Anju T <anju@linux.vnet.ibm.com>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: khandual@linux.vnet.ibm.com, maddy@linux.vnet.ibm.com,
jolsa@redhat.com, dsahern@gmail.com, acme@redhat.com,
sukadev@linux.vnet.ibm.com, hemant@linux.vnet.ibm.com,
naveen.n.rao@linux.vnet.ibm.com, linux-kernel@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v10 3/4] tools/perf: Map the ID values with register names
Date: Thu, 21 Jan 2016 15:32:25 +0530 [thread overview]
Message-ID: <56A0ACB1.5060500@linux.vnet.ibm.com> (raw)
In-Reply-To: <1453286775.14751.21.camel@ellerman.id.au>
Hi mpe,
On Wednesday 20 January 2016 04:16 PM, Michael Ellerman wrote:
> On Mon, 2016-01-11 at 15:58 +0530, Anju T wrote:
>> diff --git a/tools/perf/arch/powerpc/include/perf_regs.h b/tools/perf/arch/powerpc/include/perf_regs.h
>> new file mode 100644
>> index 0000000..93080f5
>> --- /dev/null
>> +++ b/tools/perf/arch/powerpc/include/perf_regs.h
>> @@ -0,0 +1,64 @@
>> +#ifndef ARCH_PERF_REGS_H
>> +#define ARCH_PERF_REGS_H
>> +
>> +#include <stdlib.h>
>> +#include <linux/types.h>
>> +#include <asm/perf_regs.h>
>> +
>> +#define PERF_REGS_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1)
>> +#define PERF_REGS_MAX PERF_REG_POWERPC_MAX
>> +#define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64
> That looks wrong if perf is built 32-bit ?
Yes. You are right. The ABI differs for 32 bit.
>> +#define PERF_REG_IP PERF_REG_POWERPC_NIP
>> +#define PERF_REG_SP PERF_REG_POWERPC_GPR1
>> +
>> +static const char *reg_names[] = {
>> + [PERF_REG_POWERPC_GPR0] = "gpr0",
> Can you instead call them "r0" etc.
>
> That is much more common on powerpc than "gpr0".
>
>> + [PERF_REG_POWERPC_GPR1] = "gpr1",
>> + [PERF_REG_POWERPC_GPR2] = "gpr2",
>> + [PERF_REG_POWERPC_GPR3] = "gpr3",
>> + [PERF_REG_POWERPC_GPR4] = "gpr4",
>> + [PERF_REG_POWERPC_GPR5] = "gpr5",
>> + [PERF_REG_POWERPC_GPR6] = "gpr6",
>> + [PERF_REG_POWERPC_GPR7] = "gpr7",
>> + [PERF_REG_POWERPC_GPR8] = "gpr8",
>> + [PERF_REG_POWERPC_GPR9] = "gpr9",
>> + [PERF_REG_POWERPC_GPR10] = "gpr10",
>> + [PERF_REG_POWERPC_GPR11] = "gpr11",
>> + [PERF_REG_POWERPC_GPR12] = "gpr12",
>> + [PERF_REG_POWERPC_GPR13] = "gpr13",
>> + [PERF_REG_POWERPC_GPR14] = "gpr14",
>> + [PERF_REG_POWERPC_GPR15] = "gpr15",
>> + [PERF_REG_POWERPC_GPR16] = "gpr16",
>> + [PERF_REG_POWERPC_GPR17] = "gpr17",
>> + [PERF_REG_POWERPC_GPR18] = "gpr18",
>> + [PERF_REG_POWERPC_GPR19] = "gpr19",
>> + [PERF_REG_POWERPC_GPR20] = "gpr20",
>> + [PERF_REG_POWERPC_GPR21] = "gpr21",
>> + [PERF_REG_POWERPC_GPR22] = "gpr22",
>> + [PERF_REG_POWERPC_GPR23] = "gpr23",
>> + [PERF_REG_POWERPC_GPR24] = "gpr24",
>> + [PERF_REG_POWERPC_GPR25] = "gpr25",
>> + [PERF_REG_POWERPC_GPR26] = "gpr26",
>> + [PERF_REG_POWERPC_GPR27] = "gpr27",
>> + [PERF_REG_POWERPC_GPR28] = "gpr28",
>> + [PERF_REG_POWERPC_GPR29] = "gpr29",
>> + [PERF_REG_POWERPC_GPR30] = "gpr30",
>> + [PERF_REG_POWERPC_GPR31] = "gpr31",
>> + [PERF_REG_POWERPC_NIP] = "nip",
>> + [PERF_REG_POWERPC_MSR] = "msr",
>> + [PERF_REG_POWERPC_ORIG_R3] = "orig_r3",
>> + [PERF_REG_POWERPC_CTR] = "ctr",
>> + [PERF_REG_POWERPC_LNK] = "link",
>> + [PERF_REG_POWERPC_XER] = "xer",
>> + [PERF_REG_POWERPC_CCR] = "ccr",
>> + [PERF_REG_POWERPC_TRAP] = "trap",
>> + [PERF_REG_POWERPC_DAR] = "dar",
>> + [PERF_REG_POWERPC_DSISR] = "dsisr"
>> +};
>> +
>> +static inline const char *perf_reg_name(int id)
>> +{
>> + return reg_names[id];
>> +}
>> +#endif /* ARCH_PERF_REGS_H */
>> diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
>> index 38a0853..62a2f2d 100644
>> --- a/tools/perf/config/Makefile
>> +++ b/tools/perf/config/Makefile
>> @@ -23,6 +23,11 @@ $(call detected_var,ARCH)
>>
>> NO_PERF_REGS := 1
>>
>> +# Additional ARCH settings for ppc64
>> +ifeq ($(ARCH),powerpc)
> powerpc also includes ppc, ie. 32-bit, so the comment is wrong.
I will update the comment here in the next patch. :)
>
>> + NO_PERF_REGS := 0
>> +endif
>> +
>> # Additional ARCH settings for x86
>> ifeq ($(ARCH),x86)
>> $(call detected,CONFIG_X86)
Thanks and Regards
Anju
next prev parent reply other threads:[~2016-01-21 10:02 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-11 10:28 [PATCH V10 0/4] perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
2016-01-11 10:28 ` [PATCH V10 1/4] perf/powerpc: assign an id to each powerpc register Anju T
2016-01-20 10:38 ` Michael Ellerman
2016-01-21 8:46 ` Anju T
2016-01-11 10:28 ` [PATCH V10 2/4] perf/powerpc: add support for sampling intr machine state Anju T
2016-01-20 10:40 ` Michael Ellerman
2016-01-25 3:28 ` Madhavan Srinivasan
2016-01-11 10:28 ` [PATCH v10 3/4] tools/perf: Map the ID values with register names Anju T
2016-01-20 10:46 ` Michael Ellerman
2016-01-21 10:02 ` Anju T [this message]
2016-01-11 10:28 ` [PATCH V1 4/4] tool/perf: Add sample_reg_mask to include all perf_regs regs Anju T
-- strict thread matches above, loose matches on Subject: below --
2016-01-11 5:59 [PATCH V10 0/4] perf/powerpc: Add ability to sample intr machine state in powerpc Anju T
2016-01-11 5:59 ` [PATCH v10 3/4] tools/perf: Map the ID values with register names Anju T
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