From: Paolo Bonzini <pbonzini@redhat.com>
To: Xiao Guangrong <guangrong.xiao@linux.intel.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: stable@vger.kernel.org, Andy Lutomirski <luto@amacapital.net>
Subject: Re: [PATCH 1/2] KVM: MMU: fix ept=0/pte.u=0/pte.w=0/CR0.WP=0/CR4.SMEP=1/EFER.NX=0 combo
Date: Thu, 10 Mar 2016 13:26:06 +0100 [thread overview]
Message-ID: <56E167DE.4090602@redhat.com> (raw)
In-Reply-To: <56E16527.4020908@linux.intel.com>
On 10/03/2016 13:14, Xiao Guangrong wrote:
>> More precisely, ignore_bits is only needed if guest EFER.NX=0 and we're
>> not in this CR0.WP=1/CR4.SMEP=0 situation. In theory you could have
>> guest EFER.NX=1 and host EFER.NX=0.
>
> It is not in linux, the kernel always set EFER.NX if CPUID reports it,
> arch/x86/kernel/head_64.S:
>
> 204 /* Setup EFER (Extended Feature Enable Register) */
> 205 movl $MSR_EFER, %ecx
> 206 rdmsr
> 207 btsl $_EFER_SCE, %eax /* Enable System Call */
> 208 btl $20,%edi /* No Execute supported? */
> 209 jnc 1f
> 210 btsl $_EFER_NX, %eax
> 211 btsq $_PAGE_BIT_NX,early_pmd_flags(%rip)
> 212 1: wrmsr /* Make changes effective */
>
> So if guest sees NX in its cpuid then host EFER.NX should be 1.
You're right. It's just in theory. But ignoring EFER.NX when it is 1
is technically not correct; since we have to add some special EFER_NX
logic anyway, I preferred to make it pedantically right. :)
Paolo
next prev parent reply other threads:[~2016-03-10 12:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-08 11:44 [PATCH 0/2] KVM: MMU: fix ept=0/pte.u=0/pte.w=0/CR0.WP=0/CR4.SMEP=1/EFER.NX=0 Paolo Bonzini
2016-03-08 11:44 ` [PATCH 1/2] KVM: MMU: fix ept=0/pte.u=0/pte.w=0/CR0.WP=0/CR4.SMEP=1/EFER.NX=0 combo Paolo Bonzini
2016-03-10 8:27 ` Xiao Guangrong
2016-03-10 10:01 ` Paolo Bonzini
2016-03-10 10:09 ` Paolo Bonzini
2016-03-10 12:14 ` Xiao Guangrong
2016-03-10 12:26 ` Paolo Bonzini [this message]
2016-03-10 8:46 ` Xiao Guangrong
2016-03-10 10:03 ` Paolo Bonzini
2016-03-08 11:44 ` [PATCH 2/2] KVM: MMU: fix reserved bit check for pte.u=0/pte.w=0/CR0.WP=0/CR4.SMEP=1/EFER.NX=0 Paolo Bonzini
2016-03-10 8:36 ` Xiao Guangrong
2016-03-10 10:02 ` Paolo Bonzini
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