From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752373AbcDOPZ5 (ORCPT ); Fri, 15 Apr 2016 11:25:57 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:6938 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752154AbcDOPZy (ORCPT ); Fri, 15 Apr 2016 11:25:54 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Fri, 15 Apr 2016 08:24:03 -0700 Message-ID: <57110558.8010209@nvidia.com> Date: Fri, 15 Apr 2016 20:44:32 +0530 From: Laxman Dewangan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 MIME-Version: 1.0 To: Jon Hunter , , , , , , CC: , , , Subject: Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control References: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com> <1460473007-11535-7-git-send-email-ldewangan@nvidia.com> <5710F7A4.5070902@nvidia.com> <5710F6CA.6060700@nvidia.com> <57110560.80004@nvidia.com> In-Reply-To: <57110560.80004@nvidia.com> X-Originating-IP: [10.19.65.30] X-ClientProxiedBy: DRHKMAIL103.nvidia.com (10.25.59.17) To bgmail102.nvidia.com (10.25.59.11) Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday 15 April 2016 08:44 PM, Jon Hunter wrote: > On 15/04/16 15:12, Laxman Dewangan wrote: >> >> >> All CSI pads are lined to single IO rail. > I agree with this and from the data-sheet I see the rail that powers the > CSI (and DSI) interfaces is called AVDD_DSI_CSI. But again, in the DT > document you are referring to csia, csib, csic, csid, csie, csif as > pins, but these don't appear to be physical pins, and this appears to be > more of a software means to control power to the various csi_x pins. > > It seems to me that each of the existing CSI_A_xxx pins/pads should be > mapped to or register with the appropriate power-down control and when > all pads are set to inactive this then triggers the power-down of all > the CSI_A_xxx pads. I used pins as this is the property from pincon generic so that I can use the generic implementation. Here, I will not go to the pin level control as HW does not support pin level control. I will say the unit should be interface level. Should we say IO_GROUP_CSIA, IO_GROUP_CSIB etc? >