From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758139AbcFHRBp (ORCPT ); Wed, 8 Jun 2016 13:01:45 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:50182 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751958AbcFHRBo (ORCPT ); Wed, 8 Jun 2016 13:01:44 -0400 X-IBM-Helo: d23dlp03.au.ibm.com X-IBM-MailFrom: shreyas@linux.vnet.ibm.com X-IBM-RcptTo: linux-kernel@vger.kernel.org Date: Wed, 08 Jun 2016 22:31:20 +0530 From: Shreyas B Prabhu User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.0 MIME-Version: 1.0 To: benh@au1.ibm.com, mpe@ellerman.id.au CC: ego@linux.vnet.ibm.com, mikey@neuling.org, maddy@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH v5 08/11] powerpc/powernv: Add platform support for stop instruction References: <1464871141-11568-1-git-send-email-shreyas@linux.vnet.ibm.com> <1464871141-11568-9-git-send-email-shreyas@linux.vnet.ibm.com> <1465165718.4274.20.camel@au1.ibm.com> In-Reply-To: <1465165718.4274.20.camel@au1.ibm.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16060817-1617-0000-0000-0000012A2A98 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16060817-1618-0000-0000-00004607BB12 Message-Id: <57584F60.7010504@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-06-08_07:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1606080191 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ben, Sorry for the delayed response. On 06/06/2016 03:58 AM, Benjamin Herrenschmidt wrote: > On Thu, 2016-06-02 at 07:38 -0500, Shreyas B. Prabhu wrote: >> @@ -61,8 +72,13 @@ save_sprs_to_stack: >> * Note all register i.e per-core, per-subcore or per-thread is saved >> * here since any thread in the core might wake up first >> */ >> +BEGIN_FTR_SECTION >> + mfspr r3,SPRN_PTCR >> + std r3,_PTCR(r1) >> +FTR_SECTION_ELSE >> mfspr r3,SPRN_SDR1 >> std r3,_SDR1(r1) >> +ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300) > > This is the only new SPR we care about in P9 ? > After reviewing ISA again, I've identified LMRR, LMSER and ASDR also need to be restored. I've fixed this in v6. Thanks, Shreyas