From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752593AbcFJIFz (ORCPT ); Fri, 10 Jun 2016 04:05:55 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:13971 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751559AbcFJIFu (ORCPT ); Fri, 10 Jun 2016 04:05:50 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Fri, 10 Jun 2016 01:03:23 -0700 Subject: Re: [PATCH V5 4/9] genirq: Add runtime power management support for IRQ chips To: Kevin Hilman References: <1465214023-8299-1-git-send-email-jonathanh@nvidia.com> <1465214023-8299-5-git-send-email-jonathanh@nvidia.com> <57558523.9070700@ti.com> <57558909.9090309@nvidia.com> <57558A83.1000603@ti.com> <5755917A.7070704@nvidia.com> <7htwh2c6o9.fsf@baylibre.com> CC: Grygorii Strashko , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , "Stephen Warren" , Thierry Reding , Geert Uytterhoeven , Lars-Peter Clausen , Linus Walleij , , , From: Jon Hunter Message-ID: <575A74D5.4050905@nvidia.com> Date: Fri, 10 Jun 2016 09:05:41 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <7htwh2c6o9.fsf@baylibre.com> X-Originating-IP: [10.21.132.106] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL102.nvidia.com (10.26.138.15) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/06/16 23:56, Kevin Hilman wrote: > Jon Hunter writes: > >> On 06/06/16 15:36, Grygorii Strashko wrote: >>> On 06/06/2016 05:30 PM, Jon Hunter wrote: >>>> >>>> On 06/06/16 15:13, Grygorii Strashko wrote: >>>>> On 06/06/2016 02:53 PM, Jon Hunter wrote: >>>>>> Some IRQ chips may be located in a power domain outside of the CPU >>>>>> subsystem and hence will require device specific runtime power >>>>>> management. In order to support such IRQ chips, add a pointer for a >>>>>> device structure to the irq_chip structure, and if this pointer is >>>>>> populated by the IRQ chip driver and CONFIG_PM is selected in the kernel >>>>>> configuration, then the pm_runtime_get/put APIs for this chip will be >>>>>> called when an IRQ is requested/freed, respectively. >>>>>> >>>>>> Signed-off-by: Jon Hunter >>>>>> Reviewed-by: Kevin Hilman >>>>>> Reviewed-by: Marc Zyngier >>>>>> --- >>>>>> include/linux/irq.h | 4 ++++ >>>>>> kernel/irq/chip.c | 35 +++++++++++++++++++++++++++++++++++ >>>>>> kernel/irq/internals.h | 1 + >>>>>> kernel/irq/manage.c | 31 ++++++++++++++++++++++++++++++- >>>>>> 4 files changed, 70 insertions(+), 1 deletion(-) >>>>>> >>>>>> diff --git a/include/linux/irq.h b/include/linux/irq.h >>>>>> index 4d758a7c604a..6c92a847394d 100644 >>>>>> --- a/include/linux/irq.h >>>>>> +++ b/include/linux/irq.h >>>>>> @@ -315,6 +315,7 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d) >>>>>> /** >>>>>> * struct irq_chip - hardware interrupt chip descriptor >>>>>> * >>>>>> + * @parent_device: pointer to parent device for irqchip >>>>>> * @name: name for /proc/interrupts >>>>>> * @irq_startup: start up the interrupt (defaults to ->enable if NULL) >>>>>> * @irq_shutdown: shut down the interrupt (defaults to ->disable if NULL) >>>>>> @@ -354,6 +355,7 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d) >>>>>> * @flags: chip specific flags >>>>>> */ >>>>>> struct irq_chip { >>>>>> + struct device *parent_device; >>>>>> const char *name; >>>>>> unsigned int (*irq_startup)(struct irq_data *data); >>>>>> void (*irq_shutdown)(struct irq_data *data); >>>>>> @@ -488,6 +490,8 @@ extern void handle_bad_irq(struct irq_desc *desc); >>>>>> extern void handle_nested_irq(unsigned int irq); >>>>>> >>>>>> extern int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg); >>>>>> +extern int irq_chip_pm_get(struct irq_data *data); >>>>>> +extern int irq_chip_pm_put(struct irq_data *data); >>>>>> #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY >>>>>> extern void irq_chip_enable_parent(struct irq_data *data); >>>>>> extern void irq_chip_disable_parent(struct irq_data *data); >>>>>> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c >>>>>> index 2f9f2b0e79f2..b09226e895c7 100644 >>>>>> --- a/kernel/irq/chip.c >>>>>> +++ b/kernel/irq/chip.c >>>>>> @@ -1093,3 +1093,38 @@ int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) >>>>>> >>>>>> return 0; >>>>>> } >>>>>> + >>>>>> +/** >>>>>> + * irq_chip_pm_get - Enable power for an IRQ chip >>>>>> + * @data: Pointer to interrupt specific data >>>>>> + * >>>>>> + * Enable the power to the IRQ chip referenced by the interrupt data >>>>>> + * structure. >>>>>> + */ >>>>>> +int irq_chip_pm_get(struct irq_data *data) >>>>>> +{ >>>>>> + int retval = 0; >>>>>> + >>>>>> + if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) >>>>>> + retval = pm_runtime_get_sync(data->chip->parent_device); >>>>> >>>>> Sry, for the late comment - above require pm_runtime_put_noidle(data->chip->parent_device); >>>>> in case of failure. >>>> >>>> No problem. Sorry, can you elaborate? I am not familiar with the >>>> _put_noidle(). >>>> >>> >>> Question here in use counter - pm_runtime_get_sync() will increment usage_count >>> always and it will not decrement it in case of failure. >>> pm_runtime_put_noidle() expected to restore usage_count state (-1). >> >> Thanks was not aware of that. >> >> Kevin, Marc, given that you have reviewed this one, are you ok with the >> above change Grygorii is proposing? > > Yes, that's the right thing to do on error. Thanks. I have added this in V6. Please take a look and add your reviewed-by again if all looks good. Cheers Jon -- nvpublic