From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
	id S1423143AbcFMMCl (ORCPT <rfc822;w@1wt.eu>);
	Mon, 13 Jun 2016 08:02:41 -0400
Received: from foss.arm.com ([217.140.101.70]:51269 "EHLO foss.arm.com"
	rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP
	id S1422972AbcFMMCj (ORCPT <rfc822;linux-kernel@vger.kernel.org>);
	Mon, 13 Jun 2016 08:02:39 -0400
Subject: Re: [PATCH] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs
To: Will Deacon <will.deacon@arm.com>
References: <1465571984-18776-1-git-send-email-suzuki.poulose@arm.com>
 <20160610170220.GC23223@arm.com>
Cc: catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, steve.capper@linaro.org,
        Mark Rutland <mark.rutland@arm.com>
From: Suzuki K Poulose <Suzuki.Poulose@arm.com>
Message-ID: <575EA0DC.2080801@arm.com>
Date: Mon, 13 Jun 2016 13:02:36 +0100
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101
 Thunderbird/38.8.0
MIME-Version: 1.0
In-Reply-To: <20160610170220.GC23223@arm.com>
Content-Type: text/plain; charset=us-ascii; format=flowed
Content-Transfer-Encoding: 7bit
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On 10/06/16 18:02, Will Deacon wrote:
> On Fri, Jun 10, 2016 at 04:19:44PM +0100, Suzuki K Poulose wrote:
>> From: Steve Capper <steve.capper@linaro.org>
>>
>> It can be useful for JIT software to be aware of MIDR_EL1 and
>> REVIDR_EL1 to ascertain the presence of any core errata that could
>> affect codegen.
>>
>> This patch exposes these registers through sysfs:
>>
>> /sys/devices/system/cpu/cpu$ID/identification/midr
>> /sys/devices/system/cpu/cpu$ID/identification/revidr


>> +
>> +#define CPUINFO_ATTR_RO(_name)							\
>> +	static ssize_t show_##_name (struct device *dev,			\
>> +			struct device_attribute *attr, char *buf)		\
>> +	{									\
>> +		struct cpuinfo_arm64 *info = &per_cpu(cpu_data, dev->id);	\
>> +		if (!cpu_present(dev->id))					\
>> +			return -ENODEV;						\
>> +										\
>> +		if (info->reg_midr)						\
>> +			return sprintf(buf, "0x%016x\n", info->reg_##_name);	\
>
> Should this be 0x%08x, as these are 32-bit registers?

Yes. Will change it. As per Mark's comments, I can change them to 64bit in a separate
patch.



>> +
>> +static int __init cpuinfo_regs_init(void)
>> +{
>> +	int cpu, finalcpu, ret;
>> +	struct device *dev;
>> +
>> +	for_each_present_cpu(cpu) {
>> +		dev = get_cpu_device(cpu);
>> +
>> +		if (!dev) {
>> +			ret = -ENODEV;
>> +			break;
>> +		}
>> +
>> +		ret = sysfs_create_group(&dev->kobj, &cpuregs_attr_group);
>> +		if (ret)
>> +			break;
>> +	}
>> +
>> +	if (!ret)
>> +		return 0;
>> +	/*
>> +	 * We were unable to put down sysfs groups for all the CPUs, revert
>> +	 * all the groups we have placed down s.t. none are visible.
>> +	 * Otherwise we could give a misleading picture of what's present.
>> +	 */
>> +	finalcpu = cpu;
>> +	for_each_present_cpu(cpu) {
>> +		if (cpu == finalcpu)
>> +			break;
>> +		dev = get_cpu_device(cpu);
>> +		if (dev)
>> +			sysfs_remove_group(&dev->kobj, &cpuregs_attr_group);
>> +	}
>
> Can CPUs be removed from underneath us using unregister_cpu? If so, I

Yes. Good point. Though this is done at early boot, nobody prevents
an unregister_cpu(). The safer way would be to wrap the code in
cpu_hotplug_disable()...enable().

I will respin it.



> don't think we should assume that get_cpu_device will succeed in the
> same places for both the loops.


Thanks
Suzuki