From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752000AbcFUKgy (ORCPT ); Tue, 21 Jun 2016 06:36:54 -0400 Received: from szxga04-in.huawei.com ([58.251.152.52]:55500 "EHLO szxga04-in.huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751646AbcFUKgG (ORCPT ); Tue, 21 Jun 2016 06:36:06 -0400 Subject: Re: [PATCH 08/19] arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat) To: Yury Norov , , , , , , , References: <1466207668-10549-1-git-send-email-ynorov@caviumnetworks.com> <1466207668-10549-9-git-send-email-ynorov@caviumnetworks.com> CC: , , , , , , , , , , , , , , , , , , Andrew Pinski , "Zhangjian (Bamvor)" From: "Zhangjian (Bamvor)" Message-ID: <576915B0.5040706@huawei.com> Date: Tue, 21 Jun 2016 18:23:44 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.1.0 MIME-Version: 1.0 In-Reply-To: <1466207668-10549-9-git-send-email-ynorov@caviumnetworks.com> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.111.72.170] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020201.576915CE.00E5,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: e231bb5f977f96dfcbc8755dc2bed10b Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 2016/6/18 7:54, Yury Norov wrote: > Based on patch of Andrew Pinski. > > This patch introduces is_a32_compat_task and is_a32_thread so it is > easier to say this is a a32 specific thread or a generic compat thread/task. > Corresponding functions are located in to avoid mess in > headers. > > Some files include both and , > and this is wrong because has already > included. It was fixed too. > > Signed-off-by: Yury Norov > Signed-off-by: Philipp Tomsich > Signed-off-by: Christoph Muellner > Signed-off-by: Andrew Pinski > Reviewed-by: David Daney > --- > arch/arm64/include/asm/compat.h | 19 ++--------- > arch/arm64/include/asm/elf.h | 10 +++--- > arch/arm64/include/asm/ftrace.h | 2 +- > arch/arm64/include/asm/is_compat.h | 64 ++++++++++++++++++++++++++++++++++++ > arch/arm64/include/asm/memory.h | 5 +-- > arch/arm64/include/asm/processor.h | 5 +-- > arch/arm64/include/asm/syscall.h | 2 +- > arch/arm64/include/asm/thread_info.h | 2 +- > arch/arm64/kernel/hw_breakpoint.c | 10 +++--- > arch/arm64/kernel/perf_regs.c | 2 +- > arch/arm64/kernel/process.c | 7 ++-- > arch/arm64/kernel/ptrace.c | 11 +++---- > arch/arm64/kernel/signal.c | 4 +-- > arch/arm64/kernel/traps.c | 3 +- > 14 files changed, 98 insertions(+), 48 deletions(-) > create mode 100644 arch/arm64/include/asm/is_compat.h > > diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h > index eb8432b..df2f72d 100644 > --- a/arch/arm64/include/asm/compat.h > +++ b/arch/arm64/include/asm/compat.h > @@ -24,6 +24,8 @@ > #include > #include > > +#include > + > #define COMPAT_USER_HZ 100 > #ifdef __AARCH64EB__ > #define COMPAT_UTS_MACHINE "armv8b\0\0" > @@ -298,23 +300,6 @@ struct compat_shmid64_ds { > compat_ulong_t __unused5; > }; > > -static inline int is_compat_task(void) > -{ > - return test_thread_flag(TIF_32BIT); > -} > - > -static inline int is_compat_thread(struct thread_info *thread) > -{ > - return test_ti_thread_flag(thread, TIF_32BIT); > -} > - > -#else /* !CONFIG_COMPAT */ > - > -static inline int is_compat_thread(struct thread_info *thread) > -{ > - return 0; > -} > - > #endif /* CONFIG_COMPAT */ > #endif /* __KERNEL__ */ > #endif /* __ASM_COMPAT_H */ > diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h > index 579b6e6..bef2d90 100644 > --- a/arch/arm64/include/asm/elf.h > +++ b/arch/arm64/include/asm/elf.h > @@ -16,6 +16,10 @@ > #ifndef __ASM_ELF_H > #define __ASM_ELF_H > > +#ifndef __ASSEMBLY__ > +#include > +#endif > + > #include > > /* > @@ -152,13 +156,9 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm, > int uses_interp); > > /* 1GB of VA */ > -#ifdef CONFIG_COMPAT > -#define STACK_RND_MASK (test_thread_flag(TIF_32BIT) ? \ > +#define STACK_RND_MASK (is_compat_task() ? \ > 0x7ff >> (PAGE_SHIFT - 12) : \ > 0x3ffff >> (PAGE_SHIFT - 12)) > -#else > -#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12)) > -#endif > > #ifdef __AARCH64EB__ > #define COMPAT_ELF_PLATFORM ("v8b") > diff --git a/arch/arm64/include/asm/ftrace.h b/arch/arm64/include/asm/ftrace.h > index caa955f..0feb28a 100644 > --- a/arch/arm64/include/asm/ftrace.h > +++ b/arch/arm64/include/asm/ftrace.h > @@ -54,7 +54,7 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr) > #define ARCH_TRACE_IGNORE_COMPAT_SYSCALLS > static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs) > { > - return is_compat_task(); > + return is_a32_compat_task(); > } > #endif /* ifndef __ASSEMBLY__ */ > > diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h > new file mode 100644 > index 0000000..8dba5ca > --- /dev/null > +++ b/arch/arm64/include/asm/is_compat.h > @@ -0,0 +1,64 @@ > +/* > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program. If not, see . > + */ > + > +#ifndef __ASM_IS_COMPAT_H > +#define __ASM_IS_COMPAT_H > +#ifndef __ASSEMBLY__ > + > +#include > + > +#ifdef CONFIG_AARCH32_EL0 > + > +static inline int is_a32_compat_task(void) > +{ > + return test_thread_flag(TIF_32BIT); > +} > + > +static inline int is_a32_compat_thread(struct thread_info *thread) > +{ > + return test_ti_thread_flag(thread, TIF_32BIT); > +} > + > +#else > + > +static inline int is_a32_compat_task(void) > + > +{ > + return 0; > +} > + > +static inline int is_a32_compat_thread(struct thread_info *thread) > +{ > + return 0; > +} > + > +#endif /* CONFIG_AARCH32_EL0 */ > + > +#ifdef CONFIG_COMPAT > + > +static inline int is_compat_task(void) > +{ > + return is_a32_compat_task(); > +} > + > +#endif /* CONFIG_COMPAT */ > + > +static inline int is_compat_thread(struct thread_info *thread) > +{ > + return is_a32_compat_thread(thread); > +} > + > + > +#endif /* !__ASSEMBLY__ */ > +#endif /* __ASM_IS_COMPAT_H */ > diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h > index 31b7322..4d734a1 100644 > --- a/arch/arm64/include/asm/memory.h > +++ b/arch/arm64/include/asm/memory.h > @@ -26,6 +26,7 @@ > #include > #include > #include > +#include > > /* > * Allow for constants defined here to be used from assembly code > @@ -78,9 +79,9 @@ > > #ifdef CONFIG_COMPAT > #define TASK_SIZE_32 UL(0x100000000) > -#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ > +#define TASK_SIZE (is_compat_task() ? \ > TASK_SIZE_32 : TASK_SIZE_64) > -#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \ > +#define TASK_SIZE_OF(tsk) (is_compat_thread(tsk) ? \ It should be +#define TASK_SIZE_OF(tsk) (is_compat_thread(task_thread_info(tsk)) ? \ is_compat_thread takes "struct thread_info *thread" while TASK_SIZE_OF takes "struct task_struct *tsk"tsk. Regards Bamvor > TASK_SIZE_32 : TASK_SIZE_64) > #else > #define TASK_SIZE TASK_SIZE_64 > diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h > index 5bbdbb4..1eccf47 100644 > --- a/arch/arm64/include/asm/processor.h > +++ b/arch/arm64/include/asm/processor.h > @@ -30,6 +30,7 @@ > #include > > #include > +#include > #include > #include > #include > @@ -41,7 +42,7 @@ > #define STACK_TOP_MAX TASK_SIZE_64 > #ifdef CONFIG_COMPAT > #define AARCH32_VECTORS_BASE 0xffff0000 > -#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ > +#define STACK_TOP (is_compat_task() ? \ > AARCH32_VECTORS_BASE : STACK_TOP_MAX) > #else > #define STACK_TOP STACK_TOP_MAX > @@ -94,7 +95,7 @@ struct thread_struct { > #define task_user_tls(t) \ > ({ \ > unsigned long *__tls; \ > - if (is_compat_thread(task_thread_info(t))) \ > + if (is_a32_compat_thread(task_thread_info(t))) \ > __tls = &(t)->thread.tp2_value; \ > else \ > __tls = &(t)->thread.tp_value; \ > diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/syscall.h > index 709a574..ce09641 100644 > --- a/arch/arm64/include/asm/syscall.h > +++ b/arch/arm64/include/asm/syscall.h > @@ -113,7 +113,7 @@ static inline void syscall_set_arguments(struct task_struct *task, > */ > static inline int syscall_get_arch(void) > { > - if (is_compat_task()) > + if (is_a32_compat_task()) > return AUDIT_ARCH_ARM; > > return AUDIT_ARCH_AARCH64; > diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h > index abd64bd..4daa559 100644 > --- a/arch/arm64/include/asm/thread_info.h > +++ b/arch/arm64/include/asm/thread_info.h > @@ -118,7 +118,7 @@ static inline struct thread_info *current_thread_info(void) > #define TIF_FREEZE 19 > #define TIF_RESTORE_SIGMASK 20 > #define TIF_SINGLESTEP 21 > -#define TIF_32BIT 22 /* 32bit process */ > +#define TIF_32BIT 22 /* AARCH32 process */ > > #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) > #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) > diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c > index ce21aa8..d67f518 100644 > --- a/arch/arm64/kernel/hw_breakpoint.c > +++ b/arch/arm64/kernel/hw_breakpoint.c > @@ -164,7 +164,7 @@ enum hw_breakpoint_ops { > HW_BREAKPOINT_RESTORE > }; > > -static int is_compat_bp(struct perf_event *bp) > +static int is_a32_compat_bp(struct perf_event *bp) > { > struct task_struct *tsk = bp->hw.target; > > @@ -175,7 +175,7 @@ static int is_compat_bp(struct perf_event *bp) > * deprecated behaviour if we use unaligned watchpoints in > * AArch64 state. > */ > - return tsk && is_compat_thread(task_thread_info(tsk)); > + return tsk && is_a32_compat_thread(task_thread_info(tsk)); > } > > /** > @@ -435,7 +435,7 @@ static int arch_build_bp_info(struct perf_event *bp) > * Watchpoints can be of length 1, 2, 4 or 8 bytes. > */ > if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { > - if (is_compat_bp(bp)) { > + if (is_a32_compat_bp(bp)) { > if (info->ctrl.len != ARM_BREAKPOINT_LEN_2 && > info->ctrl.len != ARM_BREAKPOINT_LEN_4) > return -EINVAL; > @@ -492,7 +492,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) > * AArch32 tasks expect some simple alignment fixups, so emulate > * that here. > */ > - if (is_compat_bp(bp)) { > + if (is_a32_compat_bp(bp)) { > if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) > alignment_mask = 0x7; > else > @@ -679,7 +679,7 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr, > > info = counter_arch_bp(wp); > /* AArch32 watchpoints are either 4 or 8 bytes aligned. */ > - if (is_compat_task()) { > + if (is_a32_compat_task()) { > if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) > alignment_mask = 0x7; > else > diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c > index 3f62b35..a79058f 100644 > --- a/arch/arm64/kernel/perf_regs.c > +++ b/arch/arm64/kernel/perf_regs.c > @@ -45,7 +45,7 @@ int perf_reg_validate(u64 mask) > > u64 perf_reg_abi(struct task_struct *task) > { > - if (is_compat_thread(task_thread_info(task))) > + if (is_a32_compat_thread(task_thread_info(task))) > return PERF_SAMPLE_REGS_ABI_32; > else > return PERF_SAMPLE_REGS_ABI_64; > diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c > index 6cd2612..c008ec8 100644 > --- a/arch/arm64/kernel/process.c > +++ b/arch/arm64/kernel/process.c > @@ -47,7 +47,6 @@ > #include > > #include > -#include > #include > #include > #include > @@ -204,7 +203,7 @@ static void tls_thread_flush(void) > { > asm ("msr tpidr_el0, xzr"); > > - if (is_compat_task()) { > + if (is_a32_compat_task()) { > current->thread.tp_value = 0; > > /* > @@ -256,7 +255,7 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, > asm("mrs %0, tpidr_el0" : "=r" (*task_user_tls(p))); > > if (stack_start) { > - if (is_compat_thread(task_thread_info(p))) > + if (is_a32_compat_thread(task_thread_info(p))) > childregs->compat_sp = stack_start; > else > childregs->sp = stack_start; > @@ -293,7 +292,7 @@ static void tls_thread_switch(struct task_struct *next) > *task_user_tls(current) = tpidr; > > tpidr = *task_user_tls(next); > - tpidrro = is_compat_thread(task_thread_info(next)) ? > + tpidrro = is_a32_compat_thread(task_thread_info(next)) ? > next->thread.tp_value : 0; > > asm( > diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c > index aa79e81..38a09338 100644 > --- a/arch/arm64/kernel/ptrace.c > +++ b/arch/arm64/kernel/ptrace.c > @@ -38,7 +38,6 @@ > #include > #include > > -#include > #include > #include > #include > @@ -85,7 +84,7 @@ static void ptrace_hbptriggered(struct perf_event *bp, > #ifdef CONFIG_AARCH32_EL0 > int i; > > - if (!is_compat_task()) > + if (!is_a32_compat_task()) > goto send_sig; > > for (i = 0; i < ARM_MAX_BRP; ++i) { > @@ -1203,9 +1202,9 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task) > * 32-bit children use an extended user_aarch32_ptrace_view to allow > * access to the TLS register. > */ > - if (is_compat_task()) > + if (is_a32_compat_task()) > return &user_aarch32_view; > - else if (is_compat_thread(task_thread_info(task))) > + else if (is_a32_compat_thread(task_thread_info(task))) > return &user_aarch32_ptrace_view; > #endif > return &user_aarch64_view; > @@ -1232,7 +1231,7 @@ static void tracehook_report_syscall(struct pt_regs *regs, > * A scratch register (ip(r12) on AArch32, x7 on AArch64) is > * used to denote syscall entry/exit: > */ > - regno = (is_compat_task() ? 12 : 7); > + regno = (is_a32_compat_task() ? 12 : 7); > saved_reg = regs->regs[regno]; > regs->regs[regno] = dir; > > @@ -1343,7 +1342,7 @@ int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task) > if (!test_tsk_thread_flag(task, TIF_SINGLESTEP)) > regs->pstate &= ~DBG_SPSR_SS; > > - if (is_compat_thread(task_thread_info(task))) > + if (is_a32_compat_thread(task_thread_info(task))) > return valid_compat_regs(regs); > else > return valid_native_regs(regs); > diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c > index a8eafdb..be02f65 100644 > --- a/arch/arm64/kernel/signal.c > +++ b/arch/arm64/kernel/signal.c > @@ -276,7 +276,7 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set, > > static void setup_restart_syscall(struct pt_regs *regs) > { > - if (is_compat_task()) > + if (is_a32_compat_task()) > compat_setup_restart_syscall(regs); > else > regs->regs[8] = __NR_restart_syscall; > @@ -295,7 +295,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) > /* > * Set up the stack frame > */ > - if (is_compat_task()) { > + if (is_a32_compat_task()) { > if (ksig->ka.sa.sa_flags & SA_SIGINFO) > ret = compat_setup_rt_frame(usig, ksig, oldset, regs); > else > diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c > index 973faec..d77be17 100644 > --- a/arch/arm64/kernel/traps.c > +++ b/arch/arm64/kernel/traps.c > @@ -18,6 +18,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -411,7 +412,7 @@ asmlinkage long do_ni_syscall(struct pt_regs *regs) > { > #ifdef CONFIG_AARCH32_EL0 > long ret; > - if (is_compat_task()) { > + if (is_a32_compat_task()) { > ret = compat_arm_syscall(regs); > if (ret != -ENOSYS) > return ret; >