From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932132AbcF2QHc (ORCPT ); Wed, 29 Jun 2016 12:07:32 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:2698 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753267AbcF2QHY (ORCPT ); Wed, 29 Jun 2016 12:07:24 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 29 Jun 2016 09:06:16 -0700 Subject: Re: [RFC PATCH 3/3] arm64: tegra210: Add XUSB powergates To: Thierry Reding References: <1467112844-26927-1-git-send-email-jonathanh@nvidia.com> <1467112844-26927-4-git-send-email-jonathanh@nvidia.com> <5773E980.7050907@nvidia.com> <20160629155659.GA20065@ulmo.ba.sec> CC: Stephen Warren , Alexandre Courbot , , From: Jon Hunter Message-ID: <5773F233.7010202@nvidia.com> Date: Wed, 29 Jun 2016 17:07:15 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.8.0 MIME-Version: 1.0 In-Reply-To: <20160629155659.GA20065@ulmo.ba.sec> X-Originating-IP: [10.21.132.149] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL102.nvidia.com (10.26.138.15) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 29/06/16 16:56, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Wed, Jun 29, 2016 at 04:30:08PM +0100, Jon Hunter wrote: >> >> On 28/06/16 12:20, Jon Hunter wrote: >>> The Tegra210 XUSB subsystem has 3 power partitions which are XUSBA >>> (super-speed logic), XUSBB (USB device logic) and XUSBC (USB host >>> logic). Populate the device-tree nodes for these XUSB partitions. >>> >>> Signed-off-by: Jon Hunter >>> --- >>> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++ >>> 1 file changed, 24 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi >>> index 65b829b762bb..efb0fd98b789 100644 >>> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi >>> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi >>> @@ -670,6 +670,30 @@ >>> <&tegra_car TEGRA210_CLK_MIPI_CAL>; >>> #power-domain-cells = <0>; >>> }; >>> + >>> + pd_xusbss: xusba { >>> + clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; >>> + clock-names = "xusb_ss"; >>> + resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; >>> + reset-names = "xusb_ss"; >>> + #power-domain-cells = <0>; >>> + }; >>> + >>> + pd_xusbdev: xusbb { >>> + clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; >>> + clock-names = "xusb_dev"; >>> + resets = <&tegra_car 95>; >>> + reset-names = "xusb_dev"; >>> + #power-domain-cells = <0>; >>> + }; >>> + >>> + pd_xusbhost: xusbc { >>> + clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; >>> + clock-names = "xusb_host"; >>> + resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; >>> + reset-names = "xusb_host"; >>> + #power-domain-cells = <0>; >>> + }; >>> }; >>> }; >> >> The 'clock-names' and 'reset-names' nodes are not used/required and so I >> will remove these. > > Please keep them and make use of the names. We used to not do this in > the past, and then things became tricky to describe in the DT bindings > in order to keep backwards-compatibility. Unfortunately, in order to use them, we would need to keep a list of all the clock and reset names in the PMC driver which would be huge. > Though perhaps you're not using them because they are found by index? In > that case I think it might still be useful to have them for consistency. Right, we just iterate over the number of the clocks and resets found when we initialise the powergate. > If you keep them, you might want to turn the _ into -. I can keep them, however, in other patches I have sent out, for example the SOR powergate (part of the DPAUX series) and Audio powergate, they do not have them. So I thought I would remove them here to be consistent. However, we could add them for these other powergates as well. Cheers Jon -- nvpublic