From: Dongdong Liu <liudongdong3@huawei.com>
To: Po Liu <po.liu@nxp.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Shawn Guo <shawnguo@kernel.org>,
"Marc Zyngier" <marc.zyngier@arm.com>,
Rob Herring <robh@kernel.org>, Roy Zang <roy.zang@nxp.com>,
Mingkai Hu <mingkai.hu@nxp.com>,
Stuart Yoder <stuart.yoder@nxp.com>,
Yang-Leo Li <leoyang.li@nxp.com>, Arnd Bergmann <arnd@arndb.de>,
Minghuan Lian <minghuan.lian@nxp.com>,
Murali Karicheri <m-karicheri2@ti.com>,
Linuxarm <linuxarm@huawei.com>
Subject: Re: [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk
Date: Wed, 6 Jul 2016 16:38:19 +0800 [thread overview]
Message-ID: <577CC37B.9070806@huawei.com> (raw)
In-Reply-To: <VI1PR0401MB1709D556D0A7F7BB9188221E92390@VI1PR0401MB1709.eurprd04.prod.outlook.com>
Hi Po
在 2016/7/5 11:03, Po Liu 写道:
> Hi Dongdong,
>
> The patch were intend to fixup the NXP layerscape serial SOC and were tested ok.
> I am not clear what platform are you trying to fix.
My platform is an ARM64 platform, PCIe host controller also use Synopsys Designware.
> The problem on your board may be as below comments:
>
>
>> -----Original Message-----
>> From: Dongdong Liu [mailto:liudongdong3@huawei.com]
>> Sent: Monday, July 04, 2016 4:44 PM
>> To: Po Liu; linux-pci@vger.kernel.org; linux-arm-
>> kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
>> devicetree@vger.kernel.org
>> Cc: Bjorn Helgaas; Shawn Guo; Marc Zyngier; Rob Herring; Roy Zang;
>> Mingkai Hu; Stuart Yoder; Yang-Leo Li; Arnd Bergmann; Minghuan Lian;
>> Murali Karicheri; Linuxarm
>> Subject: Re: [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk
>>
>> Hi Po
>>
>> I found a problem with the similar patch. as the below log.
>>
>> [ 4.287060] pci 0000:80:00.0: quirk_aer_interrupt dev->irq 416
>> [ 4.293778] pcieport 0000:80:00.0: pci_device_probe in
>> [ 4.299605] pcieport 0000:80:00.0: of_irq_parse_pci() failed with
>> rc=-22
>> [ 4.307209] pcieport 0000:80:00.0: init_service_irqs dev->irq 0
>>
>> The fucntions are called as below sequence.
>> 1. quirk_aer_interrupt, get the aer dev->irq 416.
>
> This code quirk_aer_interrupt() should be run at pci_fixup_device(pci_fixup_final) which is in the pci_bus_add_devices()
Yes, you are right.
>
>> 2. pci_device_probe->of_irq_parse_pci, of_irq_parse_pci() failed, then
>> dev->irq changed to 0.
>
> pci_device_probe->of_irq_parse_pci which in the pci_scan_child_bus() run before pci_bus_add_devices(). See dw_pcie_host_init().
> Apparently , your quirk_aer_interrupt() is running before the dev->irq assignment in the of_irq_parse_pci().
>
> So make sure your configure the quirk_aer_interrupt() run in the FINAL stage in the quirk.c OR check your host driver which you are using.
Yes , It is FINAL stage in the quirk. I use DECLARE_PCI_FIXUP_FINAL.
I find it is the below patch affect this. (https://patchwork.kernel.org/patch/9170333/),
but the patch will be applied to linux 4.8. So the problem will also be existed.
ARM64: PCI: ACPI support for legacy IRQs parsing and consolidation with DT code
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index d5d3d26..b3b8a2c 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
@@ -51,11 +51,16 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
}
/*
- * Try to assign the IRQ number from DT when adding a new device
+ * Try to assign the IRQ number when probing a new device
*/
-int pcibios_add_device(struct pci_dev *dev)
+int pcibios_alloc_irq(struct pci_dev *dev)
{
- dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
+ if (acpi_disabled)
+ dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
+#ifdef CONFIG_ACPI
+ else
+ return acpi_pci_irq_enable(dev);
+#endif
return 0;
}
Thanks
Dongdong
>
>
>>
>> So this patch could not work with aer.
>>
>> Thanks
>> Dongdong
>> 在 2016/6/14 16:24, Po Liu 写道:
>> > On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
>> > When chip support the aer interrupt with none MSI/MSI-X/INTx mode,
>> > maybe there is interrupt line for aer pme etc. Search the interrupt
>> > number in the fdt file. Then fixup the dev->irq with it.
>> >
>> > Signed-off-by: Po Liu <po.liu@nxp.com>
>> > ---
>> > changes for V3:
>> > - Move to quirk;
>> > - Only correct the irq in RC mode;
>> >
>> > drivers/pci/quirks.c | 29 +++++++++++++++++++++++++++++
>> > 1 file changed, 29 insertions(+)
>> >
>> > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index
>> > ee72ebe..8b39cce 100644
>> > --- a/drivers/pci/quirks.c
>> > +++ b/drivers/pci/quirks.c
>> > @@ -25,6 +25,7 @@
>> > #include <linux/sched.h>
>> > #include <linux/ktime.h>
>> > #include <linux/mm.h>
>> > +#include <linux/of_irq.h>
>> > #include <asm/dma.h> /* isa_dma_bridge_buggy */
>> > #include "pci.h"
>> >
>> > @@ -4419,3 +4420,31 @@ static void quirk_intel_qat_vf_cap(struct
>> pci_dev *pdev)
>> > }
>> > }
>> > DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x443,
>> > quirk_intel_qat_vf_cap);
>> > +
>> > +/* If root port doesn't support MSI/MSI-X/INTx in RC mode,
>> > + * but use standalone irq. Read the device tree for the aer
>> > + * interrupt number.
>> > + */
>> > +static void quirk_aer_interrupt(struct pci_dev *dev) {
>> > + int ret;
>> > + u8 header_type;
>> > + struct device_node *np = NULL;
>> > +
>> > + /* Only for the RC mode device */
>> > + pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
>> > + if ((header_type & 0x7F) != PCI_HEADER_TYPE_BRIDGE)
>> > + return;
>> > +
>> > + if (dev->bus->dev.of_node)
>> > + np = dev->bus->dev.of_node;
>> > +
>> > + if (IS_ENABLED(CONFIG_OF_IRQ) && np) {
>> > + ret = of_irq_get_byname(np, "aer");
>> > + if (ret > 0) {
>> > + dev->no_msi = 1;
>> > + dev->irq = ret;
>> > + }
>> > + }
>> > +}
>> > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID,
>> > +quirk_aer_interrupt);
>> >
>>
>
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>
next prev parent reply other threads:[~2016-07-06 8:42 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-26 6:00 [PATCH 2/2] aer: add support aer interrupt with none MSI/MSI-X/INTx mode Po Liu
2016-06-02 3:48 ` Bjorn Helgaas
2016-06-02 5:01 ` Po Liu
2016-06-02 13:55 ` Bjorn Helgaas
2016-06-02 15:37 ` Murali Karicheri
2016-06-03 4:09 ` Bjorn Helgaas
2016-06-03 17:31 ` Murali Karicheri
2016-06-04 3:48 ` Bjorn Helgaas
2016-06-06 7:32 ` Po Liu
2016-06-06 14:01 ` Murali Karicheri
2016-06-06 18:10 ` Bjorn Helgaas
2016-06-07 10:07 ` Po Liu
2016-06-07 22:46 ` Bjorn Helgaas
2016-06-08 4:56 ` Po Liu
2016-06-14 6:12 ` [PATCH v2 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-06-14 6:12 ` [PATCH v2 2/2] pci/aer: interrupt fixup in the quirk Po Liu
2016-06-16 13:54 ` Bjorn Helgaas
2016-06-17 3:30 ` Po Liu
2016-07-01 8:46 ` Po Liu
2016-06-14 8:24 ` [PATCH v3 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-06-14 8:24 ` [PATCH v3 2/2] pci/aer: interrupt fixup in the quirk Po Liu
2016-06-23 5:43 ` Dongdong Liu
2016-07-01 8:40 ` Po Liu
2016-07-04 8:44 ` Dongdong Liu
2016-07-05 3:03 ` Po Liu
2016-07-06 8:38 ` Dongdong Liu [this message]
2016-07-29 22:41 ` Bjorn Helgaas
2016-08-22 10:09 ` Po Liu
2016-09-20 20:47 ` Bjorn Helgaas
2016-09-21 6:51 ` Po Liu
2016-09-21 21:53 ` Bjorn Helgaas
2016-08-31 6:37 ` [PATCH v4 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-08-31 6:37 ` [PATCH v4 2/2] pci:aer: add support aer interrupt with none MSI/MSI-X/INTx mode Po Liu
2016-09-02 15:17 ` Rob Herring
2016-09-05 6:05 ` Po Liu
2016-09-13 4:40 ` [PATCH v5 1/3] arm/dts: add pcie aer interrupt-name property in the dts Po Liu
2016-09-13 4:40 ` [PATCH v5 2/3] arm64/dts: " Po Liu
2016-09-13 4:40 ` [PATCH v5 3/3] pci:aer: add support aer interrupt with none MSI/MSI-X/INTx mode Po Liu
2016-09-18 0:52 ` Shawn Guo
2016-09-18 3:37 ` Po Liu
2016-09-20 12:39 ` Shawn Guo
2016-09-21 6:54 ` Po Liu
2016-09-30 22:13 ` Shawn Guo
2016-09-23 13:06 ` Rob Herring
2016-09-26 8:25 ` Po Liu
2016-09-21 22:37 ` Bjorn Helgaas
2016-09-22 2:53 ` Po Liu
2016-09-30 9:11 ` [PATCH v6 1/3] arm/dts-ls1021: add pcie aer/pme interrupt-name property in the dts Po Liu
2016-09-30 9:11 ` [PATCH v6 2/3] arm64/dts-ls1043-ls2080: " Po Liu
2016-09-30 9:11 ` [PATCH v6 3/3] pci:add support aer/pme interrupts with none MSI/MSI-X/INTx mode Po Liu
2016-10-08 20:49 ` Rob Herring
2016-10-09 2:47 ` Po Liu
2016-09-05 2:25 ` [PATCH v4 1/2] nxp/dts: add pcie aer interrupt-name property in the dts Shawn Guo
2016-09-12 22:13 ` Bjorn Helgaas
2016-09-13 3:02 ` Po Liu
2016-06-16 0:36 ` [PATCH v3 " Shawn Guo
2016-06-16 10:50 ` Po Liu
2016-06-16 22:19 ` Rob Herring
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