From: "Guido Günther" <agx@sigxcpu.org>
To: "Kishon Vijay Abraham I" <kishon@ti.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"NXP Linux Team" <linux-imx@nxp.com>,
"Thierry Reding" <treding@nvidia.com>,
"Andreas Färber" <afaerber@suse.de>,
"Martin Blumenstingl" <martin.blumenstingl@googlemail.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Johan Hovold" <johan@kernel.org>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Abel Vesa" <abel.vesa@nxp.com>, "Li Jun" <jun.li@nxp.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
dri-devel@lists.freedesktop.org,
"Robert Chiras" <robert.chiras@nxp.com>,
"Sam Ravnborg" <sam@ravnborg.org>,
"Maxime Ripard" <maxime.ripard@bootlin.com>
Subject: [PATCH v10 1/2] dt-bindings: phy: Add documentation for mixel dphy
Date: Tue, 7 May 2019 09:47:25 +0200 [thread overview]
Message-ID: <5817853945e1c707f641ae22458a0f27aa25949e.1557215047.git.agx@sigxcpu.org> (raw)
In-Reply-To: <cover.1557215047.git.agx@sigxcpu.org>
Add support for the MIXEL DPHY IP as found on NXP's i.MX8MQ SoCs.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt
diff --git a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt
new file mode 100644
index 000000000000..9b23407233c0
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt
@@ -0,0 +1,29 @@
+Mixel DSI PHY for i.MX8
+
+The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
+MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
+electrical signals for DSI.
+
+Required properties:
+- compatible: Must be:
+ - "fsl,imx8mq-mipi-dphy"
+- clocks: Must contain an entry for each entry in clock-names.
+- clock-names: Must contain the following entries:
+ - "phy_ref": phandle and specifier referring to the DPHY ref clock
+- reg: the register range of the PHY controller
+- #phy-cells: number of cells in PHY, as defined in
+ Documentation/devicetree/bindings/phy/phy-bindings.txt
+ this must be <0>
+
+Optional properties:
+- power-domains: phandle to power domain
+
+Example:
+ dphy: dphy@30a0030 {
+ compatible = "fsl,imx8mq-mipi-dphy";
+ clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
+ clock-names = "phy_ref";
+ reg = <0x30a00300 0x100>;
+ power-domains = <&pd_mipi0>;
+ #phy-cells = <0>;
+ };
--
2.20.1
next prev parent reply other threads:[~2019-05-07 7:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-07 7:47 [PATCH v10 0/2] Mixel MIPI DPHY support for NXPs i.MX8 SOCs Guido Günther
2019-05-07 7:47 ` Guido Günther [this message]
2019-05-07 10:54 ` [PATCH v10 1/2] dt-bindings: phy: Add documentation for mixel dphy Fabio Estevam
2019-05-07 7:47 ` [PATCH v10 2/2] phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs Guido Günther
2019-05-07 10:55 ` Fabio Estevam
2019-05-07 18:12 ` Sam Ravnborg
2019-05-08 8:36 ` Guido Günther
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