From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S942258AbcLWTut (ORCPT ); Fri, 23 Dec 2016 14:50:49 -0500 Received: from mail-wj0-f181.google.com ([209.85.210.181]:35798 "EHLO mail-wj0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758771AbcLWTuq (ORCPT ); Fri, 23 Dec 2016 14:50:46 -0500 Message-ID: <585D8013.50707@baylibre.com> Date: Fri, 23 Dec 2016 20:50:43 +0100 From: Neil Armstrong User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.11; rv:24.0) Gecko/20100101 Thunderbird/24.6.0 MIME-Version: 1.0 To: Zoran Markovic , linux-kernel@vger.kernel.org CC: Andy Gross , David Brown , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [RFC PATCHv2 2/4] clk: mdm9615: Add EBI2 clock References: <1482468884-31027-1-git-send-email-zmarkovic@sierrawireless.com> In-Reply-To: <1482468884-31027-1-git-send-email-zmarkovic@sierrawireless.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le 23/12/2016 05:54, Zoran Markovic a écrit : > Add definition of EBI2 clock used by MDM9615 NAND controller. > > Cc: Andy Gross > Cc: David Brown > Cc: Michael Turquette > Cc: Stephen Boyd > Cc: Rob Herring > Cc: Mark Rutland > Cc: Neil Armstrong > Cc: linux-arm-msm@vger.kernel.org > Cc: linux-soc@vger.kernel.org > Cc: linux-clk@vger.kernel.org > Cc: devicetree@vger.kernel.org > Signed-off-by: Zoran Markovic > --- > drivers/clk/qcom/gcc-mdm9615.c | 30 ++++++++++++++++++++++++++ > include/dt-bindings/clock/qcom,gcc-mdm9615.h | 3 +++ > 2 files changed, 33 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-mdm9615.c b/drivers/clk/qcom/gcc-mdm9615.c > index 581a17f..e9e98b1 100644 > --- a/drivers/clk/qcom/gcc-mdm9615.c > +++ b/drivers/clk/qcom/gcc-mdm9615.c > @@ -1563,6 +1563,34 @@ enum { > }, > }; > > +static struct clk_branch ebi2_clk = { > + .hwcg_reg = 0x2664, > + .hwcg_bit = 6, > + .halt_reg = 0x2fcc, > + .halt_bit = 23, > + .clkr = { > + .enable_reg = 0x2664, > + .enable_mask = BIT(6) | BIT(4), > + .hw.init = &(struct clk_init_data){ > + .name = "ebi2_clk", > + .ops = &clk_branch_ops, > + }, > + }, > +}; > + > +static struct clk_branch ebi2_aon_clk = { > + .halt_reg = 0x2fcc, > + .halt_bit = 23, > + .clkr = { > + .enable_reg = 0x2664, > + .enable_mask = BIT(8), > + .hw.init = &(struct clk_init_data){ > + .name = "ebi2_aon_clk", > + .ops = &clk_branch_ops, > + }, > + }, > +}; > + > static struct clk_hw *gcc_mdm9615_hws[] = { > &cxo.hw, > }; > @@ -1637,6 +1665,8 @@ enum { > [PMIC_ARB1_H_CLK] = &pmic_arb1_h_clk.clkr, > [PMIC_SSBI2_CLK] = &pmic_ssbi2_clk.clkr, > [RPM_MSG_RAM_H_CLK] = &rpm_msg_ram_h_clk.clkr, > + [EBI2_CLK] = &ebi2_clk.clkr, > + [EBI2_AON_CLK] = &ebi2_aon_clk.clkr, > }; > > static const struct qcom_reset_map gcc_mdm9615_resets[] = { > diff --git a/include/dt-bindings/clock/qcom,gcc-mdm9615.h b/include/dt-bindings/clock/qcom,gcc-mdm9615.h > index 9ab2c40..57cdca6 100644 > --- a/include/dt-bindings/clock/qcom,gcc-mdm9615.h > +++ b/include/dt-bindings/clock/qcom,gcc-mdm9615.h > @@ -323,5 +323,8 @@ > #define CE3_H_CLK 305 > #define USB_HS1_SYSTEM_CLK_SRC 306 > #define USB_HS1_SYSTEM_CLK 307 > +#define EBI2_CLK 308 > +#define EBI2_AON_CLK 309 > + > > #endif > Hi Zoran, Thanks for this patch, we did not found the definition for these clocks at all ! Acked-by: Neil Armstrong Neil