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Wysocki" , Viresh Kumar , Nishanth Menon , Stephen Boyd , Liam Girdwood , Mark Brown Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, srv_heupstream@mediatek.com From: Chanwoo Choi Organization: Samsung Electronics Message-ID: <58938ccf-d115-d52a-1260-eb29729e6bbd@samsung.com> Date: Thu, 25 Mar 2021 17:04:08 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:59.0) Gecko/20100101 Thunderbird/59.0 MIME-Version: 1.0 In-Reply-To: <1616499241-4906-5-git-send-email-andrew-sh.cheng@mediatek.com> Content-Language: en-US Content-Transfer-Encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA02Te0xbVRzHc27b24LruBTYzjBTuJvGkQAtUHYgY7JHlusgSGaiC1kslV4p obQ3vXRCl2U4EQrZ2FijbMjW4QRdhS3tGhgE5GENNsAijwHyiNjhxhBQS6goTO2DRf77/H7n +83vfM9DwBE9xsMFeepCWquWq0g8kNvy7T5x9LPXT2WLGzb2o9a78zz0yc9zODLZH/DQ4PlF PnKPGjBkfTTGQyPtdTga+WgIoJWLdoAaxocwdL40Hk19+BWOFtcGMTTQP8xDH3fa+eifMQsX 1cyIkGWVShVRTTeaANVWO8OnrOYKnJoe68Cpe1+co0odXVzK9rCcS1XZzIDqm2jFqBXrS5mB WfkHlLRcQWsjaHWORpGnzk0h096SHZFJE8WSaEkS2k9GqOUFdAp5ND0z+lieyhOJjDgtV+k8 rUw5y5KxBw9oNbpCOkKpYQtTSJpRqJgkJoaVF7A6dW5MjqYgWSIWx0k9wux85ZO5Dh5jOlJk cP+BlYAriZUgQACJBPjXwCJWCQIFIuI+gH31pXx/4QLQutyD+ws3gJ86O7nPLcPmlU1LJ4AX LZO4d0FE/AZgxcR2L4cQKdDpbgReUSgxyYHfdJs43oJD9ABYMzyEeVU4EQW75id87iAiEj5c ewS8LCQOwunbGz4Nl3gFXuio4Hk5jHgbOlpKNzXB0HFtzrelACIdPmiq9PU5xE44OWfC/Pwy bF2q8w2GhDEAmptMPH+Go3D1sgH4OQQu9Nn4fg6HTy+VbfIZeNthx/1mA4C2rh82zfGwq8Ho mSDwTNgH77bH+tuRsG39+uYmtsPl1Qs8rwQSQmgoE/kle+DI7Azm513wVnkFfhmQtVvi1G6J ULslQu3/w24CrhnsoBm2IJdmJYx0631bge/BRyXdBzVLv8f0AkwAegEUcMhQYek7J7NFQoW8 WE9rNTKtTkWzvUDqOeBqTnhYjsbzY9SFMok0Lj4+HiVIEqUSCblT+J54ViYicuWFdD5NM7T2 uQ8TBISXYBky80JBjTNBeeewpYIxMXVketkLIVqmcayKGti2cvpYi+5W3a96QpU1P3TplPPN XSeS06nqYPEeXuz4zN4zb8RIjB+8e8J19m9hVV37tasZVzMsz/j9xS823gxW6n6sPzfjYuOa XZ9HrPd//do2/b28ZX3b9+vJgVLu7GRXb3WQNc7dvca4Ta9WLtQvOR2pKOvfG7vDsmy7d0zf KRJMuzTHr5f1dEce6v4sZHKqpPOXKuOo8VDoanMHlaofzbfpz4YWrWWM2R147uiXcyfHryj6 f3IwivK2jvcPy4JcafPZNfbjzuLQ6r1Pm74LSfvT+dhSNdXam2lo7m9wDA8+2agmuaxSLoni aFn5f3GK1QZ5BAAA X-Brightmail-Tracker: H4sIAAAAAAAAA03Re0hTURzA8c69d3fX0eq2aR4tF64iFFpbWRx7WFHgLYSiP3qDG3XToU7Z 7bUgzGlmK8Uelo2pFVa2zGg9lmVEm2JqWrOaM9fDOaxoC2tlghZ1G4H/fc75ne/550fhkudE LKXV7Wb1Ok22nBQRd51y2dxfy7erle5gNLLf+ChAFf1+EtU0dwlQpzEgRMMvSzBkG3AL0Iv7 FhK9KHQBFCptBuhSjwtDxqIFqK+gjkSBkU4MPe3oFqDDD5uF6Lf7JoHOvpGgmz+YFRKmvroe MI3mN0LGZj1KMl53E8ncqs1nitoeEcztV0cIpuy2FTCtHjvGhGyy9aKtoqU72WztXlY/L0Ut yvzgbxLk1azaXzL8FTsETi4ygQgK0kmw2xrCTEBESegHAPrqXHh4EAPPuFr+mvprKXQ6Of5a QgcBtFxU8JbSy6Bv+DLg20j6LQ6/nB7F+QNOPwZw8NiYMPxrP4CuQpuQT0g6ET766CF5T6bj 4auRAcBbTKdA79UxjDdBz4bHm44KeEfRG2Fj7QAWfjMFtp3zE7wj6DTYVW/61+L0HDhW3Y2H HQ1f+2uwsGdAe9CClwOpeVxuHpeYxyXmccl5QFhBDJvH5WTkcKo8lY7dp+A0OdweXYZiR26O DfxbemLCPWC3DikcAKOAA0AKl0eKizZtVkvEOzWGA6w+N12/J5vlHGAaRcijxc9NbekSOkOz m81i2TxW/3+KURGxh7AT3gPzrROHtM6+yuTVWnvVwQ3TC4TFV6p08sEslaxJOjnYGlf85ILC 2DM281N7zzffDkN37c9tjjjTkazVyYXrA7KzRMOoMVWdG1lh7Cw1NCd0yKZ/8Slrljvrto+G MuTStK8L25UbEzb9CiR7zddXtqVmlqnXbLb2tczaq/dMUDaSlgaB9pqy97tjYeyGUlN5Wuo7 y7djFcH+11L/4sundhmSJkwRz6tqiEr3VZZvGWq4kD+pZ7Q4aTB+ZF9tmZsMlCxZ67ojpKN6 NczVrnby80Cl9/eypXEqx5ypKZCs9nge986c/x3PN3C5Lfq0zx2lodT3BbOfxRDOdbeKW+UE l6lRJeJ6TvMHIScQfmMDAAA= X-CMS-MailID: 20210325074709epcas1p216c8211f89347c40aec85ce7e4bc60ae X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: SVC_REQ_APPROVE CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20210323113411epcas1p3dcc8649a2e3bed66866e3470d7aab447 References: <1616499241-4906-1-git-send-email-andrew-sh.cheng@mediatek.com> <1616499241-4906-5-git-send-email-andrew-sh.cheng@mediatek.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 3/23/21 8:33 PM, Andrew-sh.Cheng wrote: > From: "Andrew-sh.Cheng" > > This adds a devfreq driver for the Cache Coherent Interconnect (CCI) > of the Mediatek MT8183. > > On the MT8183 the CCI is supplied by the same regulator as the LITTLE > cores. The driver is notified when the regulator voltage changes > (driven by cpufreq) and adjusts the CCI frequency to the maximum > possible value. > > Signed-off-by: Andrew-sh.Cheng > --- > drivers/devfreq/Kconfig | 10 ++ > drivers/devfreq/Makefile | 1 + > drivers/devfreq/mt8183-cci-devfreq.c | 198 +++++++++++++++++++++++++++++++++++ > 3 files changed, 209 insertions(+) > create mode 100644 drivers/devfreq/mt8183-cci-devfreq.c > > diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig > index f56132b0ae64..2538255ac2c1 100644 > --- a/drivers/devfreq/Kconfig > +++ b/drivers/devfreq/Kconfig > @@ -111,6 +111,16 @@ config ARM_IMX8M_DDRC_DEVFREQ > This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows > adjusting DRAM frequency. > > +config ARM_MT8183_CCI_DEVFREQ > + tristate "MT8183 CCI DEVFREQ Driver" > + depends on ARM_MEDIATEK_CPUFREQ > + help > + This adds a devfreq driver for Cache Coherent Interconnect > + of Mediatek MT8183, which is shared the same regulator > + with cpu cluster. > + It can track buck voltage and update a proper CCI frequency. > + Use notification to get regulator status. > + > config ARM_TEGRA_DEVFREQ > tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver" > depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \ > diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile > index a16333ea7034..991ef7740759 100644 > --- a/drivers/devfreq/Makefile > +++ b/drivers/devfreq/Makefile > @@ -11,6 +11,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o > obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o > obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o > obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o > +obj-$(CONFIG_ARM_MT8183_CCI_DEVFREQ) += mt8183-cci-devfreq.o > obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o > obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o > > diff --git a/drivers/devfreq/mt8183-cci-devfreq.c b/drivers/devfreq/mt8183-cci-devfreq.c > new file mode 100644 > index 000000000000..018543db7bae > --- /dev/null > +++ b/drivers/devfreq/mt8183-cci-devfreq.c > @@ -0,0 +1,198 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2021 MediaTek Inc. > + > + * Author: Andrew-sh.Cheng > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define MAX_VOLT_LIMIT (1150000) > + > +struct cci_devfreq { > + struct devfreq *devfreq; > + struct regulator *cpu_reg; > + struct clk *cci_clk; > + int old_vproc; nitpick. how about using 'old_voltage'? because 'vproc' is not easy for understanding. > + unsigned long old_freq; > +}; > + > +static int mtk_cci_set_voltage(struct cci_devfreq *cci_df, int vproc) nitpick: how about changing 'vproc -> voltage'? > +{ > + int ret; > + > + ret = regulator_set_voltage(cci_df->cpu_reg, vproc, > + MAX_VOLT_LIMIT); > + if (!ret) > + cci_df->old_vproc = vproc; > + return ret; > +} > + > +static int mtk_cci_devfreq_target(struct device *dev, unsigned long *freq, > + u32 flags) > +{ > + int ret; > + struct cci_devfreq *cci_df = dev_get_drvdata(dev); > + struct dev_pm_opp *opp; > + unsigned long opp_rate, opp_voltage, old_voltage; > + > + if (!cci_df) > + return -EINVAL; > + > + if (cci_df->old_freq == *freq) > + return 0; > + > + opp_rate = *freq; > + opp = devfreq_recommended_opp(dev, &opp_rate, 1); > + opp_voltage = dev_pm_opp_get_voltage(opp); > + dev_pm_opp_put(opp); > + > + old_voltage = cci_df->old_vproc; > + if (old_voltage == 0) > + old_voltage = regulator_get_voltage(cci_df->cpu_reg); > + > + // scale up: set voltage first then freq > + if (opp_voltage > old_voltage) { > + ret = mtk_cci_set_voltage(cci_df, opp_voltage); > + if (ret) { > + pr_err("cci: failed to scale up voltage\n"); > + return ret; > + } > + } > + > + ret = clk_set_rate(cci_df->cci_clk, *freq); > + if (ret) { > + pr_err("%s: failed cci to set rate: %d\n", __func__, > + ret); > + mtk_cci_set_voltage(cci_df, old_voltage); > + return ret; > + } > + > + // scale down: set freq first then voltage > + if (opp_voltage < old_voltage) { > + ret = mtk_cci_set_voltage(cci_df, opp_voltage); > + if (ret) { > + pr_err("cci: failed to scale down voltage\n"); > + clk_set_rate(cci_df->cci_clk, cci_df->old_freq); > + return ret; > + } > + } > + > + cci_df->old_freq = *freq; > + > + return 0; > +} > + > +static struct devfreq_dev_profile cci_devfreq_profile = { > + .target = mtk_cci_devfreq_target, > +}; > + > +static int mtk_cci_devfreq_probe(struct platform_device *pdev) > +{ > + struct device *cci_dev = &pdev->dev; > + struct cci_devfreq *cci_df; > + struct devfreq_passive_data *passive_data; > + int ret; > + > + cci_df = devm_kzalloc(cci_dev, sizeof(*cci_df), GFP_KERNEL); > + if (!cci_df) > + return -ENOMEM; > + > + cci_df->cci_clk = devm_clk_get(cci_dev, "cci_clock"); > + ret = PTR_ERR_OR_ZERO(cci_df->cci_clk); > + if (ret) { > + if (ret != -EPROBE_DEFER) > + dev_err(cci_dev, "failed to get clock for CCI: %d\n", > + ret); Use dev_err_probe() to handle EPROBE_DEFER case. It makes code more simple. > + return ret; > + } > + cci_df->cpu_reg = devm_regulator_get_optional(cci_dev, "proc"); > + ret = PTR_ERR_OR_ZERO(cci_df->cpu_reg); > + if (ret) { > + if (ret != -EPROBE_DEFER) > + dev_err(cci_dev, "failed to get regulator for CCI: %d\n", > + ret); ditto. Use dev_err_probe() > + return ret; > + } > + ret = regulator_enable(cci_df->cpu_reg); > + if (ret) { > + dev_err(cci_dev, "enable buck for cci fail\n"); > + return ret; > + } > + > + ret = dev_pm_opp_of_add_table(cci_dev); > + if (ret) { > + dev_err(cci_dev, "Fail to get OPP table for CCI: %d\n", ret); > + return ret; > + } > + > + platform_set_drvdata(pdev, cci_df); > + > + passive_data = devm_kzalloc(cci_dev, sizeof(*passive_data), GFP_KERNEL); > + if (!passive_data) { > + ret = -ENOMEM; > + goto err_opp; > + } > + > + passive_data->parent_type = CPUFREQ_PARENT_DEV; > + > + cci_df->devfreq = devm_devfreq_add_device(cci_dev, > + &cci_devfreq_profile, > + DEVFREQ_GOV_PASSIVE, > + passive_data); > + if (IS_ERR(cci_df->devfreq)) { > + ret = PTR_ERR(cci_df->devfreq); > + dev_err(cci_dev, "cannot create cci devfreq device:%d\n", ret); > + goto err_opp; > + } > + > + return 0; > + > +err_opp: > + dev_pm_opp_of_remove_table(cci_dev); > + return ret; > +} > + > +static int mtk_cci_devfreq_remove(struct platform_device *pdev) > +{ > + struct device *cci_dev = &pdev->dev; > + struct cci_devfreq *cci_df; > + struct notifier_block *opp_nb; > + > + cci_df = platform_get_drvdata(pdev); > + opp_nb = &cci_df->opp_nb; > + > + dev_pm_opp_unregister_notifier(cci_dev, opp_nb); Why do you call this function without registration? If you want to catch the OPP changes of devfreq, you can use devfreq_register_opp_notifier/devfreq_unregister_opp_notifier functions. > + dev_pm_opp_of_remove_table(cci_dev); > + regulator_disable(cci_df->cpu_reg); > + > + return 0; > +} > + > +static const __maybe_unused struct of_device_id > + mediatek_cci_of_match[] = { Need to change it as following at same line: static const __maybe_unused struct of_device_idmediatek_cci_of_match[] = { > + { .compatible = "mediatek,mt8183-cci" }, > + { }, > +}; > +MODULE_DEVICE_TABLE(of, mediatek_cci_of_match); > + > +static struct platform_driver cci_devfreq_driver = { > + .probe = mtk_cci_devfreq_probe, > + .remove = mtk_cci_devfreq_remove, > + .driver = { > + .name = "mediatek-cci-devfreq", > + .of_match_table = of_match_ptr(mediatek_cci_of_match), > + }, > +}; > + > +module_platform_driver(cci_devfreq_driver); > + > +MODULE_DESCRIPTION("Mediatek CCI devfreq driver"); > +MODULE_AUTHOR("Andrew-sh.Cheng "); > +MODULE_LICENSE("GPL v2"); > -- Best Regards, Chanwoo Choi Samsung Electronics