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[71.195.29.92]) by smtp.googlemail.com with ESMTPSA id n138sm42265itb.32.2019.05.15.05.25.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 May 2019 05:25:59 -0700 (PDT) Subject: Re: [PATCH 09/18] soc: qcom: ipa: GSI transactions To: Arnd Bergmann Cc: David Miller , Bjorn Andersson , Ilias Apalodimas , syadagir@codeaurora.org, mjavid@codeaurora.org, evgreen@chromium.org, benchan@google.com, ejcaruso@google.com, abhishek.esse@gmail.com, Linux Kernel Mailing List References: <20190512012508.10608-1-elder@linaro.org> <20190512012508.10608-10-elder@linaro.org> From: Alex Elder Message-ID: <58b03138-d99f-b22f-5f8a-969612163135@linaro.org> Date: Wed, 15 May 2019 07:25:58 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/15/19 2:34 AM, Arnd Bergmann wrote: >> +static void gsi_trans_tre_fill(struct gsi_tre *dest_tre, dma_addr_t addr, >> + u32 len, bool last_tre, bool bei, >> + enum ipa_cmd_opcode opcode) >> +{ >> + struct gsi_tre tre; >> + >> + tre.addr = cpu_to_le64(addr); >> + tre.len_opcode = gsi_tre_len_opcode(opcode, len); >> + tre.reserved = 0; >> + tre.flags = gsi_tre_flags(last_tre, bei, opcode); >> + >> + *dest_tre = tre; /* Write TRE as a single (16-byte) unit */ >> +} > > Have you checked that the atomic write is actually what happens here, > but looking at the compiler output? You might need to add a 'volatile' > qualifier to the dest_tre argument so the temporary structure doesn't > get optimized away here. No, and I really should have checked, since I'm assuming that's what will happen. I will check, and may well add the volatile regardless. >> +/* Cancel a channel's pending transactions */ >> +void gsi_channel_trans_cancel_pending(struct gsi_channel *channel) >> +{ >> + struct gsi_trans_info *trans_info = &channel->trans_info; >> + u32 evt_ring_id = channel->evt_ring_id; >> + struct gsi *gsi = channel->gsi; >> + struct gsi_evt_ring *evt_ring; >> + struct gsi_trans *trans; >> + unsigned long flags; >> + >> + evt_ring = &gsi->evt_ring[evt_ring_id]; >> + >> + spin_lock_irqsave(&evt_ring->ring.spinlock, flags); >> + >> + list_for_each_entry(trans, &trans_info->pending, links) >> + trans->result = -ECANCELED; >> + >> + list_splice_tail_init(&trans_info->pending, &trans_info->complete); >> + >> + spin_unlock_irqrestore(&evt_ring->ring.spinlock, flags); >> + >> + spin_lock_irqsave(&gsi->spinlock, flags); >> + >> + if (gsi->event_enable_bitmap & BIT(evt_ring_id)) >> + gsi_event_handle(gsi, evt_ring_id); >> + >> + spin_unlock_irqrestore(&gsi->spinlock, flags); >> +} > > That is a lot of irqsave()/irqrestore() operations. Do you actually call > all of these functions from hardirq context? The transaction list is definitely updated in IRQ context, but I think it is no longer updated in hardirq context (the softirq was a recent change). This particular function is definitely not called in a hardirq context, so I can remove the irqsave/irqrestore. I'll survey my spinlock use throughout the driver and will remove any irqsave/irqrestore used in non-hardirq contexts. Thanks. -Alex > Arnd >