linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Johan Hovold <johan@kernel.org>
Cc: "Johan Hovold" <johan+linaro@kernel.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Konrad Dybcio" <konrad.dybcio@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 02/10] dt-bindings: PCI: qcom: Do not require 'msi-map-mask'
Date: Wed, 14 Feb 2024 14:38:57 +0100	[thread overview]
Message-ID: <59bd6e54-0d5d-4e1a-818a-475a96c223ff@linaro.org> (raw)
In-Reply-To: <Zcy4Atjmb6-wofCL@hovoldconsulting.com>

On 14/02/2024 13:54, Johan Hovold wrote:
> On Wed, Feb 14, 2024 at 01:01:20PM +0100, Krzysztof Kozlowski wrote:
>> On 12/02/2024 17:50, Johan Hovold wrote:
>>> Whether the 'msi-map-mask' property is needed or not depends on how the
>>> MSI interrupts are mapped and it should therefore not be described as
>>> required.
>>
>> I could imagine that on all devices the interrupts are mapped in a way
>> you need to provide msi-map-mask. IOW, can there be a Qualcomm platform
>> without msi-map-mask?
> 
> I don't have access to the documentation so I'll leave that for you guys
> to determine. I do note that the downstream DT does not use it and that
> we have a new devicetree in linux-next which also does not have it:
> 
> 	https://lore.kernel.org/r/20240125-topic-sm8650-upstream-pcie-its-v1-1-cb506deeb43e@linaro.org
> 
> But at least the latter looks like an omission that should be fixed.

Hm, either that or the mask for sm8450 was not needed as well. Anyway,
thanks for explanation, appreciated!


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof


  reply	other threads:[~2024-02-14 13:39 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-12 16:50 [PATCH 00/10] arm64: dts: qcom: sc8280xp: enable GICv3 ITS for PCIe Johan Hovold
2024-02-12 16:50 ` [PATCH 01/10] dt-bindings: PCI: qcom: Allow 'required-opps' Johan Hovold
2024-02-14 11:57   ` Krzysztof Kozlowski
2024-02-14 11:57   ` Krzysztof Kozlowski
2024-02-12 16:50 ` [PATCH 02/10] dt-bindings: PCI: qcom: Do not require 'msi-map-mask' Johan Hovold
2024-02-14 12:01   ` Krzysztof Kozlowski
2024-02-14 12:54     ` Johan Hovold
2024-02-14 13:38       ` Krzysztof Kozlowski [this message]
2024-02-16 16:54         ` Manivannan Sadhasivam
2024-02-20  7:41           ` Johan Hovold
2024-02-20  8:42             ` Johan Hovold
2024-02-21  5:26             ` Manivannan Sadhasivam
2024-02-21 10:30               ` Johan Hovold
2024-02-22  3:53                 ` Manivannan Sadhasivam
2024-02-12 16:50 ` [PATCH 03/10] arm64: dts: qcom: sc8280xp: add missing PCIe minimum OPP Johan Hovold
2024-02-12 16:50 ` [PATCH 04/10] arm64: dts: qcom: sc8280xp-crd: limit pcie4 link speed Johan Hovold
2024-02-15 20:47   ` Konrad Dybcio
2024-02-16  7:12     ` Johan Hovold
2024-02-16 12:04       ` Johan Hovold
2024-02-12 16:50 ` [PATCH 05/10] arm64: dts: qcom: sc8280xp-x13s: " Johan Hovold
2024-02-12 16:50 ` [PATCH 06/10] arm64: dts: qcom: sc8280xp: enable GICv3 ITS for PCIe Johan Hovold
2024-02-15 20:50   ` Konrad Dybcio
2024-02-12 16:50 ` [RFC 07/10] dt-bindings: PCI: qcom: Allow 'aspm-no-l0s' Johan Hovold
2024-02-12 16:50 ` [RFC 08/10] PCI: qcom: Add support for disabling ASPM L0s in devicetree Johan Hovold
2024-02-12 19:34   ` Bjorn Helgaas
2024-02-12 20:21     ` Johan Hovold
2024-02-12 16:50 ` [RFC 09/10] arm64: dts: qcom: sc8280xp-crd: disable ASPM L0s for NVMe Johan Hovold
2024-02-12 16:50 ` [PATCH 10/10] arm64: dts: qcom: sc8280xp-x13s: disable ASPM L0s for Wi-Fi Johan Hovold
2024-02-14  6:35 ` [PATCH 00/10] arm64: dts: qcom: sc8280xp: enable GICv3 ITS for PCIe Manivannan Sadhasivam
2024-02-14 11:09   ` Johan Hovold
2024-02-16 14:54     ` Manivannan Sadhasivam

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=59bd6e54-0d5d-4e1a-818a-475a96c223ff@linaro.org \
    --to=krzysztof.kozlowski@linaro.org \
    --cc=andersson@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=johan+linaro@kernel.org \
    --cc=johan@kernel.org \
    --cc=konrad.dybcio@linaro.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=kw@linux.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).