From: Lu Baolu <baolu.lu@linux.intel.com>
To: Peter Xu <peterx@redhat.com>
Cc: Joerg Roedel <joro@8bytes.org>,
David Woodhouse <dwmw2@infradead.org>,
ashok.raj@intel.com, sanjay.k.kumar@intel.com,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
yi.y.sun@intel.com, jacob.jun.pan@intel.com
Subject: Re: [PATCH v4 1/9] iommu/vt-d: Global PASID name space
Date: Wed, 11 Jul 2018 14:32:44 +0800 [thread overview]
Message-ID: <5B45A48C.7040300@linux.intel.com> (raw)
In-Reply-To: <20180711024843.GC2359@xz-mi>
Hi Peter,
Thanks for looking into my patches.
On 07/11/2018 10:48 AM, Peter Xu wrote:
> On Mon, Jul 09, 2018 at 01:22:50PM +0800, Lu Baolu wrote:
>
> [...]
>
>> +#ifndef __INTEL_PASID_H
>> +#define __INTEL_PASID_H
>> +
>> +#define PASID_MIN 0x1
>> +#define PASID_MAX 0x20000
> Could I ask whether there's a reason to explicitly use 0x20000 for the
> max value? Asked since I saw that the example in the spec gave 20
> bits for PASID (please refer to spec ver 3.0 section 3.4.3 figure
> 3-8). Also I believe that's what I was told by Kevin.
>
> I saw that the old per-iommu max value is set to 0x20000, though I'm
> not sure whether that's still needed since if we're going to have
> two-level pasid table then AFAIU we don't need physically continuous
> memory any more (though I saw that we don't yet have two-level pasid
> table implemented):
>
> /* Eventually I'm promised we will get a multi-level PASID table
> * and it won't have to be physically contiguous. Until then,
> * limit the size because 8MiB contiguous allocations can be hard
> * to come by. The limit of 0x20000, which is 1MiB for each of
> * the PASID and PASID-state tables, is somewhat arbitrary. */
> if (iommu->pasid_max > 0x20000)
> iommu->pasid_max = 0x20000;
You are right.
With the scalable mode defined in vt-d v3.0, wecould use the full 20 bit
pasid. Previous max pasid was intended to save contiguous physical memory.
Best regards,
Lu Baolu
next prev parent reply other threads:[~2018-07-11 6:33 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-09 5:22 [PATCH v4 0/9] iommu/vt-d: Improve PASID id and table management Lu Baolu
2018-07-09 5:22 ` [PATCH v4 1/9] iommu/vt-d: Global PASID name space Lu Baolu
2018-07-11 2:48 ` Peter Xu
2018-07-11 6:32 ` Lu Baolu [this message]
2018-07-09 5:22 ` [PATCH v4 2/9] iommu/vt-d: Avoid using idr_for_each_entry() Lu Baolu
2018-07-09 5:22 ` [PATCH v4 3/9] iommu/vt-d: Apply global PASID in SVA Lu Baolu
2018-07-09 5:22 ` [PATCH v4 4/9] iommu/vt-d: Move device_domain_info to header Lu Baolu
2018-07-09 5:22 ` [PATCH v4 5/9] iommu/vt-d: Add for_each_device_domain() helper Lu Baolu
2018-07-09 5:22 ` [PATCH v4 6/9] iommu/vt-d: Per PCI device pasid table interfaces Lu Baolu
2018-07-11 2:18 ` Peter Xu
2018-07-11 7:26 ` Lu Baolu
2018-07-11 7:39 ` Peter Xu
2018-07-09 5:22 ` [PATCH v4 7/9] iommu/vt-d: Allocate and free pasid table Lu Baolu
2018-07-09 5:22 ` [PATCH v4 8/9] iommu/vt-d: Apply per pci device pasid table in SVA Lu Baolu
2018-07-09 5:22 ` [PATCH v4 9/9] iommu/vt-d: Remove the obsolete per iommu pasid tables Lu Baolu
2018-07-11 2:45 ` Peter Xu
2018-07-11 6:43 ` Lu Baolu
2018-07-13 1:34 ` Lu Baolu
2018-07-13 5:00 ` Peter Xu
2018-07-14 7:23 ` Lu Baolu
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