From: Neil Armstrong <narmstrong@baylibre.com>
To: stable@vger.kernel.org
Cc: Jerome Brunet <jbrunet@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Carlo Caione <carlo@caione.org>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: meson: axg: mark fdiv2 and fdiv3 as critical
Date: Tue, 13 Nov 2018 17:43:25 +0100 [thread overview]
Message-ID: <5BEAFF2D.9080105@baylibre.com> (raw)
In-Reply-To: <20181108093123.21498-1-jbrunet@baylibre.com>
Hi Stable team,
Le 08/11/2018 10:31, Jerome Brunet a écrit :
> Similar to gxbb and gxl platforms, axg SCPI Cortex-M co-processor
> uses the fdiv2 and fdiv3 to, among other things, provide the cpu
> clock.
>
> Until clock hand-off mechanism makes its way to CCF and the generic
> SCPI claims platform specific clocks, these clocks must be marked as
> critical to make sure they are never disabled when needed by the
> co-processor.
>
> Fixes: 05f814402d61 ("clk: meson: add fdiv clock gates")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Could this fix go into the next 4.18 and 4.19 stable releases since it hit linus master with commit id d6ee1e7e9004d3d246cdfa14196989e0a9466c16 ?
Thanks,
Neil
> ---
>
> Hi Stephen,
>
> If you can put this one in clk-fixes as well, it would be awesome.
> It is basically the same thing as the change you took this Tuesday.
>
> Since then, we had reports the same problem with SCPI was happening
> on the axg, calling for the same fixup.
>
> Cheers
> Jerome
>
> drivers/clk/meson/axg.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
> index c981159b02c0..792735d7e46e 100644
> --- a/drivers/clk/meson/axg.c
> +++ b/drivers/clk/meson/axg.c
> @@ -325,6 +325,7 @@ static struct clk_regmap axg_fclk_div2 = {
> .ops = &clk_regmap_gate_ops,
> .parent_names = (const char *[]){ "fclk_div2_div" },
> .num_parents = 1,
> + .flags = CLK_IS_CRITICAL,
> },
> };
>
> @@ -349,6 +350,18 @@ static struct clk_regmap axg_fclk_div3 = {
> .ops = &clk_regmap_gate_ops,
> .parent_names = (const char *[]){ "fclk_div3_div" },
> .num_parents = 1,
> + /*
> + * FIXME:
> + * This clock, as fdiv2, is used by the SCPI FW and is required
> + * by the platform to operate correctly.
> + * Until the following condition are met, we need this clock to
> + * be marked as critical:
> + * a) The SCPI generic driver claims and enable all the clocks
> + * it needs
> + * b) CCF has a clock hand-off mechanism to make the sure the
> + * clock stays on until the proper driver comes along
> + */
> + .flags = CLK_IS_CRITICAL,
> },
> };
>
>
next prev parent reply other threads:[~2018-11-13 16:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-08 9:31 [PATCH] clk: meson: axg: mark fdiv2 and fdiv3 as critical Jerome Brunet
2018-11-08 13:26 ` Neil Armstrong
2018-11-08 18:21 ` Stephen Boyd
2018-11-13 16:43 ` Neil Armstrong [this message]
2018-11-15 17:39 ` Sasha Levin
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