From: "Wysocki, Rafael J" <rafael.j.wysocki@intel.com>
To: Vidya Sagar <vidyas@nvidia.com>, <bhelgaas@google.com>,
<sathyanarayanan.kuppuswamy@linux.intel.com>,
<kai.heng.feng@canonical.com>
Cc: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<treding@nvidia.com>, <jonathanh@nvidia.com>, <kthota@nvidia.com>,
<mmaddireddy@nvidia.com>, <sagar.tv@gmail.com>
Subject: Re: [PATCH V1] PCI/ASPM: Update saved buffers with latest ASPM configuration
Date: Wed, 25 Jan 2023 16:01:15 +0100 [thread overview]
Message-ID: <5be13f9b-fc19-28ee-3ed5-8b85f85ca7e8@intel.com> (raw)
In-Reply-To: <20230125133830.20620-1-vidyas@nvidia.com>
On 1/25/2023 2:38 PM, Vidya Sagar wrote:
> Many PCIe device drivers save the configuration state of their respective
> devices during probe and restore the same when their 'slot_reset' hook
> is called through PCIe Error Recovery System.
> If the system has a change in ASPM policy after the driver's probe is
> called and before error event occurred, 'slot_reset' hook restores the
> PCIe configuration state to what it was at the time of probe but not with
> what it was just before the occurrence of the error event.
> This effectively leads to a mismatch in the ASPM configuration between
> the device and its upstream parent device.
> This patch addresses that issue by updating the saved configuration state
> of the device with the latest info whenever there is a change w.r.t ASPM
> policy.
>
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
If it is a bug fix (which I think it is), a Fixes tag should be present
here.
If the reporter's names are known, Reported-by tags should be present
here too.
If anyone except for you has tested this patch, a Tested-by tag should
be present here.
> ---
> drivers/pci/pci.h | 4 ++++
> drivers/pci/pcie/aspm.c | 40 ++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 44 insertions(+)
>
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index 9ed3b5550043..f4a91d4fe96d 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -566,12 +566,16 @@ bool pcie_wait_for_link(struct pci_dev *pdev, bool active);
> void pcie_aspm_init_link_state(struct pci_dev *pdev);
> void pcie_aspm_exit_link_state(struct pci_dev *pdev);
> void pcie_aspm_powersave_config_link(struct pci_dev *pdev);
> +void pci_save_aspm_state(struct pci_dev *dev);
> +void pci_restore_aspm_state(struct pci_dev *dev);
> void pci_save_aspm_l1ss_state(struct pci_dev *dev);
> void pci_restore_aspm_l1ss_state(struct pci_dev *dev);
> #else
> static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) { }
> static inline void pcie_aspm_exit_link_state(struct pci_dev *pdev) { }
> static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { }
> +static inline void pci_save_aspm_state(struct pci_dev *dev) { }
> +static inline void pci_restore_aspm_state(struct pci_dev *dev) { }
> static inline void pci_save_aspm_l1ss_state(struct pci_dev *dev) { }
> static inline void pci_restore_aspm_l1ss_state(struct pci_dev *dev) { }
> #endif
> diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
> index 53a1fa306e1e..f25e0440d36b 100644
> --- a/drivers/pci/pcie/aspm.c
> +++ b/drivers/pci/pcie/aspm.c
> @@ -151,6 +151,7 @@ static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable)
> PCI_EXP_LNKCTL_CLKREQ_EN,
> val);
> link->clkpm_enabled = !!enable;
> + pci_save_aspm_state(child);
> }
>
> static void pcie_set_clkpm(struct pcie_link_state *link, int enable)
> @@ -757,6 +758,39 @@ static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state)
> PCI_L1SS_CTL1_L1SS_MASK, val);
> }
>
> +void pci_save_aspm_state(struct pci_dev *dev)
> +{
> + int i = 0;
> + struct pci_cap_saved_state *save_state;
> + u16 *cap;
> +
> + if (!pci_is_pcie(dev))
> + return;
> +
> + save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
> + if (!save_state)
> + return;
> +
> + cap = (u16 *)&save_state->cap.data[0];
> + i++;
> + pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &cap[i++]);
> +}
> +
> +void pci_restore_aspm_state(struct pci_dev *dev)
> +{
> + int i = 0;
> + struct pci_cap_saved_state *save_state;
> + u16 *cap;
> +
> + save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
> + if (!save_state)
> + return;
> +
> + cap = (u16 *)&save_state->cap.data[0];
> + i++;
> + pcie_capability_write_word(dev, PCI_EXP_LNKCTL, cap[i++]);
> +}
> +
> void pci_save_aspm_l1ss_state(struct pci_dev *dev)
> {
> struct pci_cap_saved_state *save_state;
> @@ -849,6 +883,12 @@ static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)
> pcie_config_aspm_dev(parent, upstream);
>
> link->aspm_enabled = state;
> +
> + /* Update latest ASPM configuration in saved context */
> + pci_save_aspm_state(link->downstream);
> + pci_save_aspm_l1ss_state(link->downstream);
> + pci_save_aspm_state(parent);
> + pci_save_aspm_l1ss_state(parent);
> }
>
> static void pcie_config_aspm_path(struct pcie_link_state *link)
next prev parent reply other threads:[~2023-01-25 15:01 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-25 13:38 [PATCH V1] PCI/ASPM: Update saved buffers with latest ASPM configuration Vidya Sagar
2023-01-25 15:01 ` Wysocki, Rafael J [this message]
2023-01-25 17:22 ` Vidya Sagar
2023-01-26 11:43 ` Wysocki, Rafael J
2023-01-26 21:22 ` Sathyanarayanan Kuppuswamy
2023-01-27 20:10 ` Bjorn Helgaas
2023-01-28 18:26 ` Bjorn Helgaas
2024-01-03 10:35 ` [PATCH V2] PCI/ASPM: Update saved buffers with latest ASPM Vidya Sagar
2024-01-03 15:37 ` Kuppuswamy Sathyanarayanan
2024-01-08 12:42 ` [PATCH V3] " Vidya Sagar
2024-02-20 4:07 ` Vidya Sagar
2024-02-20 17:23 ` Bjorn Helgaas
2024-02-22 17:44 ` [PATCH V4] " Vidya Sagar
2024-02-22 18:20 ` Kuppuswamy Sathyanarayanan
2024-02-22 18:54 ` Bjorn Helgaas
2024-02-22 19:54 ` Kuppuswamy Sathyanarayanan
2024-02-22 22:14 ` David E. Box
2024-02-22 20:59 ` Vidya Sagar
2024-03-05 22:03 ` Bjorn Helgaas
2024-03-05 22:35 ` Kuppuswamy Sathyanarayanan
2024-03-06 1:37 ` David E. Box
2024-03-07 22:01 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5be13f9b-fc19-28ee-3ed5-8b85f85ca7e8@intel.com \
--to=rafael.j.wysocki@intel.com \
--cc=bhelgaas@google.com \
--cc=jonathanh@nvidia.com \
--cc=kai.heng.feng@canonical.com \
--cc=kthota@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=mmaddireddy@nvidia.com \
--cc=sagar.tv@gmail.com \
--cc=sathyanarayanan.kuppuswamy@linux.intel.com \
--cc=treding@nvidia.com \
--cc=vidyas@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).